Commit f4409ee8 authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher
Browse files

drm/amdgpu: add gpu reset control for umc page retirement 



Add a reset parameter for umc page retirement, let user decide whether
call gpu reset in umc page retirement.

Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Acked-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d764fb2a

drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c

+12 −3
Original line number Diff line number Diff line
@@ -23,6 +23,13 @@ 


#include "amdgpu_ras.h"



static int amdgpu_umc_process_ras_data_cb(struct amdgpu_device *adev,

		void *ras_error_status,

		struct amdgpu_iv_entry *entry)

{

	return amdgpu_umc_do_page_retirement(adev, ras_error_status, entry, true);

}



int amdgpu_umc_ras_late_init(struct amdgpu_device *adev)

{

	int r;
@@ -88,9 +95,10 @@ void amdgpu_umc_ras_fini(struct amdgpu_device *adev) 
	}

}



int amdgpu_umc_process_ras_data_cb(struct amdgpu_device *adev,

int amdgpu_umc_do_page_retirement(struct amdgpu_device *adev,

		void *ras_error_status,

		struct amdgpu_iv_entry *entry)

		struct amdgpu_iv_entry *entry,

		bool reset)

{

	struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;

	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
@@ -164,6 +172,7 @@ int amdgpu_umc_process_ras_data_cb(struct amdgpu_device *adev, 
				adev->smu.ppt_funcs->send_hbm_bad_pages_num(&adev->smu, con->eeprom_control.ras_num_recs);

		}



		if (reset)

			amdgpu_ras_reset_gpu(adev);

	}

drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h

+3 −2
Original line number Diff line number Diff line
@@ -78,9 +78,10 @@ struct amdgpu_umc { 


int amdgpu_umc_ras_late_init(struct amdgpu_device *adev);

void amdgpu_umc_ras_fini(struct amdgpu_device *adev);

int amdgpu_umc_process_ras_data_cb(struct amdgpu_device *adev,

int amdgpu_umc_do_page_retirement(struct amdgpu_device *adev,

		void *ras_error_status,

		struct amdgpu_iv_entry *entry);

		struct amdgpu_iv_entry *entry,

		bool reset);

int amdgpu_umc_process_ecc_irq(struct amdgpu_device *adev,

		struct amdgpu_irq_src *source,

		struct amdgpu_iv_entry *entry);