Unverified Commit f4361718 authored by Palmer Dabbelt's avatar Palmer Dabbelt
Browse files

riscv: Add macro for multiple nop instructions 

Some cases need multiple nop instructions and arm64 already has a
nice helper for not needing to write all of them out but instead
use a helper to add n nops.

So add a similar thing to riscv and convert the T-Head PMA
alternative to use it.

* 'riscv-nops' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux.git:
  riscv: convert the t-head pbmt errata to use the __nops macro
  riscv: introduce nops and __nops macros for NOP sequences
parents 3f190111 9c2ea4a3

arch/riscv/include/asm/asm.h

+15 −0
Original line number Diff line number Diff line
@@ -67,4 +67,19 @@ 
#error "Unexpected __SIZEOF_SHORT__"

#endif



#ifdef __ASSEMBLY__



/* Common assembly source macros */



/*

 * NOP sequence

 */

.macro	nops, num

	.rept	\num

	nop

	.endr

.endm



#endif /* __ASSEMBLY__ */



#endif /* _ASM_RISCV_ASM_H */

arch/riscv/include/asm/barrier.h

+2 −0
Original line number Diff line number Diff line
@@ -13,6 +13,8 @@ 
#ifndef __ASSEMBLY__



#define nop()		__asm__ __volatile__ ("nop")

#define __nops(n)	".rept	" #n "\nnop\n.endr\n"

#define nops(n)		__asm__ __volatile__ (__nops(n))



#define RISCV_FENCE(p, s) \

	__asm__ __volatile__ ("fence " #p "," #s : : : "memory")

arch/riscv/include/asm/errata_list.h

+1 −7
Original line number Diff line number Diff line
@@ -68,13 +68,7 @@ asm(ALTERNATIVE_2("li %0, 0\t\nnop", \ 
 */

#define ALT_THEAD_PMA(_val)						\

asm volatile(ALTERNATIVE(						\

	"nop\n\t"							\

	"nop\n\t"							\

	"nop\n\t"							\

	"nop\n\t"							\

	"nop\n\t"							\

	"nop\n\t"							\

	"nop",								\

	__nops(7),							\

	"li      t3, %2\n\t"						\

	"slli    t3, t3, %4\n\t"					\

	"and     t3, %0, t3\n\t"					\