Commit f3edefce authored by Michael Strauss's avatar Michael Strauss Committed by Alex Deucher
Browse files

drm/amd/display: Add force detile buffer size debug flag 



[WHY]
Allow changing DET size with debug flag for testing purposes

Reviewed-by: default avatarNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarMichael Strauss <michael.strauss@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2f2a4b18

drivers/gpu/drm/amd/display/dc/dc.h

+12 −0
Original line number Diff line number Diff line
@@ -75,6 +75,16 @@ enum dc_plane_type { 
	DC_PLANE_TYPE_DCN_UNIVERSAL,

};



// Sizes defined as multiples of 64KB

enum det_size {

	DET_SIZE_DEFAULT = 0,

	DET_SIZE_192KB = 3,

	DET_SIZE_256KB = 4,

	DET_SIZE_320KB = 5,

	DET_SIZE_384KB = 6

};





struct dc_plane_cap {

	enum dc_plane_type type;

	uint32_t blends_with_above : 1;
@@ -692,6 +702,8 @@ struct dc_debug_options { 
	/* FEC/PSR1 sequence enable delay in 100us */

	uint8_t fec_enable_delay_in100us;

	bool enable_driver_sequence_debug;

	enum det_size crb_alloc_policy;

	int crb_alloc_policy_min_disp_count;

#if defined(CONFIG_DRM_AMD_DC_DCN)

	bool disable_z10;

	bool enable_sw_cntl_psr;

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c

+3 −0
Original line number Diff line number Diff line
@@ -1830,6 +1830,9 @@ static int dcn31_populate_dml_pipes_from_context( 
			context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192;

			pipes[0].pipe.src.unbounded_req_mode = true;

		}

	} else if (context->stream_count >= dc->debug.crb_alloc_policy_min_disp_count

			&& dc->debug.crb_alloc_policy > DET_SIZE_DEFAULT) {

		context->bw_ctx.dml.ip.det_buffer_size_kbytes = dc->debug.crb_alloc_policy * 64;

	}



	return pipe_cnt;