Unverified Commit f3e22d32 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'sti-dt-for-v5.15-round1' of... 

Merge tag 'sti-dt-for-v5.15-round1' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into arm/dt

Highlights:
-----------
  - Introduce 4KOpen STiH418-b2264 board
  - Remove clk_ignore_unused from STi boards DT
  - Remove clock-output-names and clk_critical properties
  - Update some clock compatible

* tag 'sti-dt-for-v5.15-round1' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
  ARM: dts: sti: remove clk_ignore_unused from bootargs for stih410-b2260
  ARM: dts: sti: remove clk_ignore_unused from bootargs for stih418-b2199
  ARM: dts: sti: remove clk_ignore_unused from bootargs for stih410-b2120
  ARM: dts: sti: remove clk_ignore_unused from bootargs for stih407-b2120
  ARM: dts: sti: Introduce 4KOpen (stih418-b2264) board
  ARM: dts: sti: add the thermal sensor node within stih418
  ARM: dts: sti: disable rng11 on the stih418 platform
  ARM: dts: sti: add the spinor controller node within stih407-family
  ARM: dts: sti: update clkgen-fsyn entries in stih418-clock
  ARM: dts: sti: update clkgen-fsyn entries in stih410-clock
  ARM: dts: sti: update clkgen-fsyn entries in stih407-clock
  ARM: dts: sti: update clkgen-pll entries in stih418-clock
  ARM: dts: sti: update clkgen-pll entries in stih410-clock
  ARM: dts: sti: update clkgen-pll entries in stih407-clock
  ARM: dts: sti: update flexgen compatible within stih410-clock
  ARM: dts: sti: update flexgen compatible within stih407-clock
  ARM: dts: sti: update flexgen compatible within stih418-clock

Link: https://lore.kernel.org/r/1d95209f-9cb4-47a3-2696-7a93df7cdc05@foss.st.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 3df51252 f9807f9c

arch/arm/boot/dts/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -1079,7 +1079,8 @@ dtb-$(CONFIG_ARCH_STI) += \ 
	stih407-b2120.dtb \

	stih410-b2120.dtb \

	stih410-b2260.dtb \

	stih418-b2199.dtb

	stih418-b2199.dtb \

	stih418-b2264.dtb

dtb-$(CONFIG_ARCH_STM32) += \

	stm32f429-disco.dtb \

	stm32f469-disco.dtb \

arch/arm/boot/dts/stih407-b2120.dts

+0 −1
Original line number Diff line number Diff line
@@ -11,7 +11,6 @@ 
	compatible = "st,stih407-b2120", "st,stih407";



	chosen {

		bootargs = "clk_ignore_unused";

		stdout-path = &sbc_serial0;

	};

arch/arm/boot/dts/stih407-clock.dtsi

+12 −116
Original line number Diff line number Diff line
@@ -36,8 +36,6 @@ 
				compatible = "st,stih407-clkgen-plla9";



				clocks = <&clk_sysin>;



				clock-output-names = "clockgen-a9-pll-odf";

			};

		};
@@ -74,24 +72,18 @@ 


			clk_s_a0_pll: clk-s-a0-pll {

				#clock-cells = <1>;

				compatible = "st,clkgen-pll0";

				compatible = "st,clkgen-pll0-a0";



				clocks = <&clk_sysin>;



				clock-output-names = "clk-s-a0-pll-ofd-0";

				clock-critical = <0>; /* clk-s-a0-pll-ofd-0 */

			};



			clk_s_a0_flexgen: clk-s-a0-flexgen {

				compatible = "st,flexgen";

				compatible = "st,flexgen", "st,flexgen-stih407-a0";



				#clock-cells = <1>;



				clocks = <&clk_s_a0_pll 0>,

					 <&clk_sysin>;



				clock-output-names = "clk-ic-lmi0";

				clock-critical = <CLK_IC_LMI0>;

			};

		};
@@ -101,12 +93,6 @@ 
			reg = <0x9103000 0x1000>;



			clocks = <&clk_sysin>;



			clock-output-names = "clk-s-c0-fs0-ch0",

					     "clk-s-c0-fs0-ch1",

					     "clk-s-c0-fs0-ch2",

					     "clk-s-c0-fs0-ch3";

			clock-critical = <0>; /* clk-s-c0-fs0-ch0 */

		};



		clk_s_c0: clockgen-c@9103000 {
@@ -115,26 +101,21 @@ 


			clk_s_c0_pll0: clk-s-c0-pll0 {

				#clock-cells = <1>;

				compatible = "st,clkgen-pll0";

				compatible = "st,clkgen-pll0-c0";



				clocks = <&clk_sysin>;



				clock-output-names = "clk-s-c0-pll0-odf-0";

				clock-critical = <0>; /* clk-s-c0-pll0-odf-0 */

			};



			clk_s_c0_pll1: clk-s-c0-pll1 {

				#clock-cells = <1>;

				compatible = "st,clkgen-pll1";

				compatible = "st,clkgen-pll1-c0";



				clocks = <&clk_sysin>;



				clock-output-names = "clk-s-c0-pll1-odf-0";

			};



			clk_s_c0_flexgen: clk-s-c0-flexgen {

				#clock-cells = <1>;

				compatible = "st,flexgen";

				compatible = "st,flexgen", "st,flexgen-stih407-c0";



				clocks = <&clk_s_c0_pll0 0>,

					 <&clk_s_c0_pll1 0>,
@@ -144,45 +125,6 @@ 
					 <&clk_s_c0_quadfs 3>,

					 <&clk_sysin>;



				clock-output-names = "clk-icn-gpu",

						     "clk-fdma",

						     "clk-nand",

						     "clk-hva",

						     "clk-proc-stfe",

						     "clk-proc-tp",

						     "clk-rx-icn-dmu",

						     "clk-rx-icn-hva",

						     "clk-icn-cpu",

						     "clk-tx-icn-dmu",

						     "clk-mmc-0",

						     "clk-mmc-1",

						     "clk-jpegdec",

						     "clk-ext2fa9",

						     "clk-ic-bdisp-0",

						     "clk-ic-bdisp-1",

						     "clk-pp-dmu",

						     "clk-vid-dmu",

						     "clk-dss-lpc",

						     "clk-st231-aud-0",

						     "clk-st231-gp-1",

						     "clk-st231-dmu",

						     "clk-icn-lmi",

						     "clk-tx-icn-disp-1",

						     "clk-icn-sbc",

						     "clk-stfe-frc2",

						     "clk-eth-phy",

						     "clk-eth-ref-phyclk",

						     "clk-flash-promip",

						     "clk-main-disp",

						     "clk-aux-disp",

						     "clk-compo-dvp";

				clock-critical = <CLK_PROC_STFE>,

						 <CLK_ICN_CPU>,

						 <CLK_TX_ICN_DMU>,

						 <CLK_EXT2F_A9>,

						 <CLK_ICN_LMI>,

						 <CLK_ICN_SBC>;



				/*

				 * ARM Peripheral clock for timers

				 */
@@ -202,15 +144,10 @@ 


		clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 {

			#clock-cells = <1>;

			compatible = "st,quadfs";

			compatible = "st,quadfs-d0";

			reg = <0x9104000 0x1000>;



			clocks = <&clk_sysin>;



			clock-output-names = "clk-s-d0-fs0-ch0",

					     "clk-s-d0-fs0-ch1",

					     "clk-s-d0-fs0-ch2",

					     "clk-s-d0-fs0-ch3";

		};



		clockgen-d0@9104000 {
@@ -219,32 +156,22 @@ 


			clk_s_d0_flexgen: clk-s-d0-flexgen {

				#clock-cells = <1>;

				compatible = "st,flexgen-audio", "st,flexgen";

				compatible = "st,flexgen", "st,flexgen-stih407-d0";



				clocks = <&clk_s_d0_quadfs 0>,

					 <&clk_s_d0_quadfs 1>,

					 <&clk_s_d0_quadfs 2>,

					 <&clk_s_d0_quadfs 3>,

					 <&clk_sysin>;



				clock-output-names = "clk-pcm-0",

						     "clk-pcm-1",

						     "clk-pcm-2",

						     "clk-spdiff";

			};

		};



		clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 {

			#clock-cells = <1>;

			compatible = "st,quadfs";

			compatible = "st,quadfs-d2";

			reg = <0x9106000 0x1000>;



			clocks = <&clk_sysin>;



			clock-output-names = "clk-s-d2-fs0-ch0",

					     "clk-s-d2-fs0-ch1",

					     "clk-s-d2-fs0-ch2",

					     "clk-s-d2-fs0-ch3";

		};



		clockgen-d2@9106000 {
@@ -253,7 +180,7 @@ 


			clk_s_d2_flexgen: clk-s-d2-flexgen {

				#clock-cells = <1>;

				compatible = "st,flexgen-video", "st,flexgen";

				compatible = "st,flexgen", "st,flexgen-stih407-d2";



				clocks = <&clk_s_d2_quadfs 0>,

					 <&clk_s_d2_quadfs 1>,
@@ -262,37 +189,15 @@ 
					 <&clk_sysin>,

					 <&clk_sysin>,

					 <&clk_tmdsout_hdmi>;



				clock-output-names = "clk-pix-main-disp",

						     "clk-pix-pip",

						     "clk-pix-gdp1",

						     "clk-pix-gdp2",

						     "clk-pix-gdp3",

						     "clk-pix-gdp4",

						     "clk-pix-aux-disp",

						     "clk-denc",

						     "clk-pix-hddac",

						     "clk-hddac",

						     "clk-sddac",

						     "clk-pix-dvo",

						     "clk-dvo",

						     "clk-pix-hdmi",

						     "clk-tmds-hdmi",

						     "clk-ref-hdmiphy";

			};

		};



		clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 {

			#clock-cells = <1>;

			compatible = "st,quadfs";

			compatible = "st,quadfs-d3";

			reg = <0x9107000 0x1000>;



			clocks = <&clk_sysin>;



			clock-output-names = "clk-s-d3-fs0-ch0",

					     "clk-s-d3-fs0-ch1",

					     "clk-s-d3-fs0-ch2",

					     "clk-s-d3-fs0-ch3";

		};



		clockgen-d3@9107000 {
@@ -301,22 +206,13 @@ 


			clk_s_d3_flexgen: clk-s-d3-flexgen {

				#clock-cells = <1>;

				compatible = "st,flexgen";

				compatible = "st,flexgen", "st,flexgen-stih407-d3";



				clocks = <&clk_s_d3_quadfs 0>,

					 <&clk_s_d3_quadfs 1>,

					 <&clk_s_d3_quadfs 2>,

					 <&clk_s_d3_quadfs 3>,

					 <&clk_sysin>;



				clock-output-names = "clk-stfe-frc1",

						     "clk-tsout-0",

						     "clk-tsout-1",

						     "clk-mchi",

						     "clk-vsens-compo",

						     "clk-frc1-remote",

						     "clk-lpc-0",

						     "clk-lpc-1";

			};

		};

	};

arch/arm/boot/dts/stih407-family.dtsi

+15 −0
Original line number Diff line number Diff line
@@ -616,6 +616,21 @@ 
			st,lpc-mode = <ST_LPC_MODE_CLKSRC>;

		};



		spifsm: spifsm@9022000{

			compatible = "st,spi-fsm";

			reg = <0x9022000 0x1000>;

			reg-names = "spi-fsm";

			clocks = <&clk_s_c0_flexgen CLK_FLASH_PROMIP>;

			clock-names = "emi_clk";

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_fsm>;

			st,syscfg = <&syscfg_core>;

			st,boot-device-reg = <0x8c4>;

			st,boot-device-spi = <0x68>;



			status = "disabled";

		};



		sata0: sata@9b20000 {

			compatible = "st,ahci";

			reg = <0x9b20000 0x1000>;

arch/arm/boot/dts/stih410-b2120.dts

+0 −1
Original line number Diff line number Diff line
@@ -11,7 +11,6 @@ 
	compatible = "st,stih410-b2120", "st,stih410";



	chosen {

		bootargs = "clk_ignore_unused";

		stdout-path = &sbc_serial0;

	};