Commit f3c03664 authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Nicolas Ferre
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ARM: dts: at91: sama7g5-ek: use blocks 0 and 1 of TCB0 as cs and ce 



Use blocks 0 and 1 of TCB0 for clocksource and clockevent functionality.
PIT64B is already enabled on SAMA7G5 targets for this but TCB0 will be
used as a fallback only in case PIT64B will fail to probe.

Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211020094656.3343242-4-claudiu.beznea@microchip.com
parent 9430ff34

arch/arm/boot/dts/at91-sama7g5ek.dts

+12 −0
Original line number Diff line number Diff line
@@ -654,6 +654,18 @@ 
	status = "okay";

};



&tcb0 {

	timer0: timer@0 {

		compatible = "atmel,tcb-timer";

		reg = <0>;

	};



	timer1: timer@1 {

		compatible = "atmel,tcb-timer";

		reg = <1>;

	};

};



&trng {

	status = "okay";

};