Commit f287c66a authored by Justin Green's avatar Justin Green Committed by Chun-Kuang Hu
Browse files

drm/mediatek: Refactor pixel format logic 



Add an DDP component interface for querying pixel format support
and move list of supported pixel formats into DDP components
instead of mtk_drm_plane.c

Tested by running Chrome on an MT8195.

Signed-off-by: default avatarJustin Green <greenjustin@chromium.org>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20230309210416.1167020-2-greenjustin@chromium.org/


Signed-off-by: default avatarChun-Kuang Hu <chunkuang.hu@kernel.org>
parent 813420eb

drivers/gpu/drm/mediatek/mtk_disp_drv.h

+4 −0
Original line number Diff line number Diff line
@@ -96,6 +96,8 @@ void mtk_ovl_register_vblank_cb(struct device *dev, 
void mtk_ovl_unregister_vblank_cb(struct device *dev);

void mtk_ovl_enable_vblank(struct device *dev);

void mtk_ovl_disable_vblank(struct device *dev);

const u32 *mtk_ovl_get_formats(struct device *dev);

size_t mtk_ovl_get_num_formats(struct device *dev);



void mtk_rdma_bypass_shadow(struct device *dev);

int mtk_rdma_clk_enable(struct device *dev);
@@ -115,6 +117,8 @@ void mtk_rdma_register_vblank_cb(struct device *dev, 
void mtk_rdma_unregister_vblank_cb(struct device *dev);

void mtk_rdma_enable_vblank(struct device *dev);

void mtk_rdma_disable_vblank(struct device *dev);

const u32 *mtk_rdma_get_formats(struct device *dev);

size_t mtk_rdma_get_num_formats(struct device *dev);



int mtk_mdp_rdma_clk_enable(struct device *dev);

void mtk_mdp_rdma_clk_disable(struct device *dev);

drivers/gpu/drm/mediatek/mtk_disp_ovl.c

+44 −0
Original line number Diff line number Diff line
@@ -67,6 +67,20 @@ 
#define	OVL_CON_VIRT_FLIP	BIT(9)

#define	OVL_CON_HORZ_FLIP	BIT(10)



static const u32 mt8173_formats[] = {

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_ARGB8888,

	DRM_FORMAT_BGRX8888,

	DRM_FORMAT_BGRA8888,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_XBGR8888,

	DRM_FORMAT_RGB888,

	DRM_FORMAT_BGR888,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_UYVY,

	DRM_FORMAT_YUYV,

};



struct mtk_disp_ovl_data {

	unsigned int addr;

	unsigned int gmc_bits;
@@ -74,6 +88,8 @@ struct mtk_disp_ovl_data { 
	bool fmt_rgb565_is_0;

	bool smi_id_en;

	bool supports_afbc;

	const u32 *formats;

	size_t num_formats;

};



/*
@@ -139,6 +155,20 @@ void mtk_ovl_disable_vblank(struct device *dev) 
	writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_INTEN);

}



const u32 *mtk_ovl_get_formats(struct device *dev)

{

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);



	return ovl->data->formats;

}



size_t mtk_ovl_get_num_formats(struct device *dev)

{

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);



	return ovl->data->num_formats;

}



int mtk_ovl_clk_enable(struct device *dev)

{

	struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
@@ -496,6 +526,8 @@ static const struct mtk_disp_ovl_data mt2701_ovl_driver_data = { 
	.gmc_bits = 8,

	.layer_nr = 4,

	.fmt_rgb565_is_0 = false,

	.formats = mt8173_formats,

	.num_formats = ARRAY_SIZE(mt8173_formats),

};



static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = {
@@ -503,6 +535,8 @@ static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = { 
	.gmc_bits = 8,

	.layer_nr = 4,

	.fmt_rgb565_is_0 = true,

	.formats = mt8173_formats,

	.num_formats = ARRAY_SIZE(mt8173_formats),

};



static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = {
@@ -510,6 +544,8 @@ static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = { 
	.gmc_bits = 10,

	.layer_nr = 4,

	.fmt_rgb565_is_0 = true,

	.formats = mt8173_formats,

	.num_formats = ARRAY_SIZE(mt8173_formats),

};



static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = {
@@ -517,6 +553,8 @@ static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = { 
	.gmc_bits = 10,

	.layer_nr = 2,

	.fmt_rgb565_is_0 = true,

	.formats = mt8173_formats,

	.num_formats = ARRAY_SIZE(mt8173_formats),

};



static const struct mtk_disp_ovl_data mt8192_ovl_driver_data = {
@@ -525,6 +563,8 @@ static const struct mtk_disp_ovl_data mt8192_ovl_driver_data = { 
	.layer_nr = 4,

	.fmt_rgb565_is_0 = true,

	.smi_id_en = true,

	.formats = mt8173_formats,

	.num_formats = ARRAY_SIZE(mt8173_formats),

};



static const struct mtk_disp_ovl_data mt8192_ovl_2l_driver_data = {
@@ -533,6 +573,8 @@ static const struct mtk_disp_ovl_data mt8192_ovl_2l_driver_data = { 
	.layer_nr = 2,

	.fmt_rgb565_is_0 = true,

	.smi_id_en = true,

	.formats = mt8173_formats,

	.num_formats = ARRAY_SIZE(mt8173_formats),

};



static const struct mtk_disp_ovl_data mt8195_ovl_driver_data = {
@@ -542,6 +584,8 @@ static const struct mtk_disp_ovl_data mt8195_ovl_driver_data = { 
	.fmt_rgb565_is_0 = true,

	.smi_id_en = true,

	.supports_afbc = true,

	.formats = mt8173_formats,

	.num_formats = ARRAY_SIZE(mt8173_formats),

};



static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = {

drivers/gpu/drm/mediatek/mtk_disp_rdma.c

+38 −0
Original line number Diff line number Diff line
@@ -55,8 +55,24 @@ 


#define RDMA_MEM_GMC				0x40402020



static const u32 mt8173_formats[] = {

	DRM_FORMAT_XRGB8888,

	DRM_FORMAT_ARGB8888,

	DRM_FORMAT_BGRX8888,

	DRM_FORMAT_BGRA8888,

	DRM_FORMAT_ABGR8888,

	DRM_FORMAT_XBGR8888,

	DRM_FORMAT_RGB888,

	DRM_FORMAT_BGR888,

	DRM_FORMAT_RGB565,

	DRM_FORMAT_UYVY,

	DRM_FORMAT_YUYV,

};



struct mtk_disp_rdma_data {

	unsigned int fifo_size;

	const u32 *formats;

	size_t num_formats;

};



/*
@@ -127,6 +143,20 @@ void mtk_rdma_disable_vblank(struct device *dev) 
	rdma_update_bits(dev, DISP_REG_RDMA_INT_ENABLE, RDMA_FRAME_END_INT, 0);

}



const u32 *mtk_rdma_get_formats(struct device *dev)

{

	struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);



	return rdma->data->formats;

}



size_t mtk_rdma_get_num_formats(struct device *dev)

{

	struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);



	return rdma->data->num_formats;

}



int mtk_rdma_clk_enable(struct device *dev)

{

	struct mtk_disp_rdma *rdma = dev_get_drvdata(dev);
@@ -361,18 +391,26 @@ static int mtk_disp_rdma_remove(struct platform_device *pdev) 


static const struct mtk_disp_rdma_data mt2701_rdma_driver_data = {

	.fifo_size = SZ_4K,

	.formats = mt8173_formats,

	.num_formats = ARRAY_SIZE(mt8173_formats),

};



static const struct mtk_disp_rdma_data mt8173_rdma_driver_data = {

	.fifo_size = SZ_8K,

	.formats = mt8173_formats,

	.num_formats = ARRAY_SIZE(mt8173_formats),

};



static const struct mtk_disp_rdma_data mt8183_rdma_driver_data = {

	.fifo_size = 5 * SZ_1K,

	.formats = mt8173_formats,

	.num_formats = ARRAY_SIZE(mt8173_formats),

};



static const struct mtk_disp_rdma_data mt8195_rdma_driver_data = {

	.fifo_size = 1920,

	.formats = mt8173_formats,

	.num_formats = ARRAY_SIZE(mt8173_formats),

};



static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = {

drivers/gpu/drm/mediatek/mtk_drm_crtc.c

+3 −1
Original line number Diff line number Diff line
@@ -856,7 +856,9 @@ static int mtk_drm_crtc_init_comp_planes(struct drm_device *drm_dev, 
				BIT(pipe),

				mtk_drm_crtc_plane_type(mtk_crtc->layer_nr,

							num_planes),

				mtk_ddp_comp_supported_rotations(comp));

				mtk_ddp_comp_supported_rotations(comp),

				mtk_ddp_comp_get_formats(comp),

				mtk_ddp_comp_get_num_formats(comp));

		if (ret)

			return ret;

drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c

+4 −0
Original line number Diff line number Diff line
@@ -359,6 +359,8 @@ static const struct mtk_ddp_comp_funcs ddp_ovl = { 
	.layer_config = mtk_ovl_layer_config,

	.bgclr_in_on = mtk_ovl_bgclr_in_on,

	.bgclr_in_off = mtk_ovl_bgclr_in_off,

	.get_formats = mtk_ovl_get_formats,

	.get_num_formats = mtk_ovl_get_num_formats,

};



static const struct mtk_ddp_comp_funcs ddp_postmask = {
@@ -381,6 +383,8 @@ static const struct mtk_ddp_comp_funcs ddp_rdma = { 
	.disable_vblank = mtk_rdma_disable_vblank,

	.layer_nr = mtk_rdma_layer_nr,

	.layer_config = mtk_rdma_layer_config,

	.get_formats = mtk_rdma_get_formats,

	.get_num_formats = mtk_rdma_get_num_formats,

};



static const struct mtk_ddp_comp_funcs ddp_ufoe = {