Commit f240b688 authored by Sudarsana Reddy Kalluru's avatar Sudarsana Reddy Kalluru Committed by David S. Miller
Browse files

qed: Add support for processing fcoe tlv request. 



Signed-off-by: default avatarSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com>
Signed-off-by: default avatarAriel Elior <ariel.elior@cavium.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 2528c389

drivers/net/ethernet/qlogic/qed/qed_mcp.h

+3 −1
Original line number Diff line number Diff line
@@ -216,7 +216,8 @@ enum qed_ov_wol { 
enum qed_mfw_tlv_type {

	QED_MFW_TLV_GENERIC = 0x1,	/* Core driver TLVs */

	QED_MFW_TLV_ETH = 0x2,		/* L2 driver TLVs */

	QED_MFW_TLV_MAX = 0x4,

	QED_MFW_TLV_FCOE = 0x4,		/* FCoE protocol TLVs */

	QED_MFW_TLV_MAX = 0x8,

};



struct qed_mfw_tlv_generic {
@@ -245,6 +246,7 @@ struct qed_mfw_tlv_generic { 
union qed_mfw_tlv_data {

	struct qed_mfw_tlv_generic generic;

	struct qed_mfw_tlv_eth eth;

	struct qed_mfw_tlv_fcoe fcoe;

};



/**

drivers/net/ethernet/qlogic/qed/qed_mng_tlv.c

+828 −0

File changed.

Preview size limit exceeded, changes collapsed.

include/linux/qed/qed_if.h

+193 −0
Original line number Diff line number Diff line
@@ -219,6 +219,199 @@ struct qed_mfw_tlv_eth { 
	bool num_rxqs_full_set;

};



#define QED_MFW_TLV_TIME_SIZE	14

struct qed_mfw_tlv_time {

	bool b_set;

	u8 month;

	u8 day;

	u8 hour;

	u8 min;

	u16 msec;

	u16 usec;

};



struct qed_mfw_tlv_fcoe {

	u8 scsi_timeout;

	bool scsi_timeout_set;

	u32 rt_tov;

	bool rt_tov_set;

	u32 ra_tov;

	bool ra_tov_set;

	u32 ed_tov;

	bool ed_tov_set;

	u32 cr_tov;

	bool cr_tov_set;

	u8 boot_type;

	bool boot_type_set;

	u8 npiv_state;

	bool npiv_state_set;

	u32 num_npiv_ids;

	bool num_npiv_ids_set;

	u8 switch_name[8];

	bool switch_name_set;

	u16 switch_portnum;

	bool switch_portnum_set;

	u8 switch_portid[3];

	bool switch_portid_set;

	u8 vendor_name[8];

	bool vendor_name_set;

	u8 switch_model[8];

	bool switch_model_set;

	u8 switch_fw_version[8];

	bool switch_fw_version_set;

	u8 qos_pri;

	bool qos_pri_set;

	u8 port_alias[3];

	bool port_alias_set;

	u8 port_state;

#define QED_MFW_TLV_PORT_STATE_OFFLINE  (0)

#define QED_MFW_TLV_PORT_STATE_LOOP             (1)

#define QED_MFW_TLV_PORT_STATE_P2P              (2)

#define QED_MFW_TLV_PORT_STATE_FABRIC           (3)

	bool port_state_set;

	u16 fip_tx_descr_size;

	bool fip_tx_descr_size_set;

	u16 fip_rx_descr_size;

	bool fip_rx_descr_size_set;

	u16 link_failures;

	bool link_failures_set;

	u8 fcoe_boot_progress;

	bool fcoe_boot_progress_set;

	u64 rx_bcast;

	bool rx_bcast_set;

	u64 tx_bcast;

	bool tx_bcast_set;

	u16 fcoe_txq_depth;

	bool fcoe_txq_depth_set;

	u16 fcoe_rxq_depth;

	bool fcoe_rxq_depth_set;

	u64 fcoe_rx_frames;

	bool fcoe_rx_frames_set;

	u64 fcoe_rx_bytes;

	bool fcoe_rx_bytes_set;

	u64 fcoe_tx_frames;

	bool fcoe_tx_frames_set;

	u64 fcoe_tx_bytes;

	bool fcoe_tx_bytes_set;

	u16 crc_count;

	bool crc_count_set;

	u32 crc_err_src_fcid[5];

	bool crc_err_src_fcid_set[5];

	struct qed_mfw_tlv_time crc_err[5];

	u16 losync_err;

	bool losync_err_set;

	u16 losig_err;

	bool losig_err_set;

	u16 primtive_err;

	bool primtive_err_set;

	u16 disparity_err;

	bool disparity_err_set;

	u16 code_violation_err;

	bool code_violation_err_set;

	u32 flogi_param[4];

	bool flogi_param_set[4];

	struct qed_mfw_tlv_time flogi_tstamp;

	u32 flogi_acc_param[4];

	bool flogi_acc_param_set[4];

	struct qed_mfw_tlv_time flogi_acc_tstamp;

	u32 flogi_rjt;

	bool flogi_rjt_set;

	struct qed_mfw_tlv_time flogi_rjt_tstamp;

	u32 fdiscs;

	bool fdiscs_set;

	u8 fdisc_acc;

	bool fdisc_acc_set;

	u8 fdisc_rjt;

	bool fdisc_rjt_set;

	u8 plogi;

	bool plogi_set;

	u8 plogi_acc;

	bool plogi_acc_set;

	u8 plogi_rjt;

	bool plogi_rjt_set;

	u32 plogi_dst_fcid[5];

	bool plogi_dst_fcid_set[5];

	struct qed_mfw_tlv_time plogi_tstamp[5];

	u32 plogi_acc_src_fcid[5];

	bool plogi_acc_src_fcid_set[5];

	struct qed_mfw_tlv_time plogi_acc_tstamp[5];

	u8 tx_plogos;

	bool tx_plogos_set;

	u8 plogo_acc;

	bool plogo_acc_set;

	u8 plogo_rjt;

	bool plogo_rjt_set;

	u32 plogo_src_fcid[5];

	bool plogo_src_fcid_set[5];

	struct qed_mfw_tlv_time plogo_tstamp[5];

	u8 rx_logos;

	bool rx_logos_set;

	u8 tx_accs;

	bool tx_accs_set;

	u8 tx_prlis;

	bool tx_prlis_set;

	u8 rx_accs;

	bool rx_accs_set;

	u8 tx_abts;

	bool tx_abts_set;

	u8 rx_abts_acc;

	bool rx_abts_acc_set;

	u8 rx_abts_rjt;

	bool rx_abts_rjt_set;

	u32 abts_dst_fcid[5];

	bool abts_dst_fcid_set[5];

	struct qed_mfw_tlv_time abts_tstamp[5];

	u8 rx_rscn;

	bool rx_rscn_set;

	u32 rx_rscn_nport[4];

	bool rx_rscn_nport_set[4];

	u8 tx_lun_rst;

	bool tx_lun_rst_set;

	u8 abort_task_sets;

	bool abort_task_sets_set;

	u8 tx_tprlos;

	bool tx_tprlos_set;

	u8 tx_nos;

	bool tx_nos_set;

	u8 rx_nos;

	bool rx_nos_set;

	u8 ols;

	bool ols_set;

	u8 lr;

	bool lr_set;

	u8 lrr;

	bool lrr_set;

	u8 tx_lip;

	bool tx_lip_set;

	u8 rx_lip;

	bool rx_lip_set;

	u8 eofa;

	bool eofa_set;

	u8 eofni;

	bool eofni_set;

	u8 scsi_chks;

	bool scsi_chks_set;

	u8 scsi_cond_met;

	bool scsi_cond_met_set;

	u8 scsi_busy;

	bool scsi_busy_set;

	u8 scsi_inter;

	bool scsi_inter_set;

	u8 scsi_inter_cond_met;

	bool scsi_inter_cond_met_set;

	u8 scsi_rsv_conflicts;

	bool scsi_rsv_conflicts_set;

	u8 scsi_tsk_full;

	bool scsi_tsk_full_set;

	u8 scsi_aca_active;

	bool scsi_aca_active_set;

	u8 scsi_tsk_abort;

	bool scsi_tsk_abort_set;

	u32 scsi_rx_chk[5];

	bool scsi_rx_chk_set[5];

	struct qed_mfw_tlv_time scsi_chk_tstamp[5];

};



#define DIRECT_REG_WR(reg_addr, val) writel((u32)val, \

					    (void __iomem *)(reg_addr))