Commit f2260414 authored by Dave Gerlach's avatar Dave Gerlach Committed by Nishanth Menon
Browse files

soc: ti: wkup_m3_ipc: Add support for toggling VTT regulator 

Some boards like the AM335x EVM-SK and AM437x GP EVM provide software
control via a GPIO pin to toggle the DDR VTT regulator to reduce power
consumption in low power states.

The VTT regulator should be disabled after enabling self-refresh on
suspend, and should be enabled before disabling self-refresh on resume.
This is to allow proper self-refresh entry/exit commands to be
transmitted to the memory.

The "ti,vtt-gpio-pin" device tree property in the wkup_m3_ipc node
specifies which GPIO pin to use. This property is communicated to the
Wakeup Cortex M3 co-processor where the actual toggling of the GPIO pin
happens in CM3 firmware [1].

Please note that the GPIO pin must be on the GPIO0 module as that module
is in the wakeup power domain.

[1] https://git.ti.com/cgit/processor-firmware/ti-amx3-cm3-pm-firmware/tree/src/pm_services/ddr.c?h=08.02.00.006#n190



Signed-off-by: default avatarDave Gerlach <d-gerlach@ti.com>
Signed-off-by: default avatarKeerthy <j-keerthy@ti.com>
[dfustini: remove the unnecessary "ti,needs-vtt-toggle" property]
Signed-off-by: default avatarDrew Fustini <dfustini@baylibre.com>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220409211215.2529387-3-dfustini@baylibre.com
parent 12eeb749

drivers/soc/ti/wkup_m3_ipc.c

+24 −2
Original line number Diff line number Diff line
@@ -40,6 +40,13 @@ 
#define M3_FW_VERSION_MASK		0xffff

#define M3_WAKE_SRC_MASK		0xff



#define IPC_MEM_TYPE_SHIFT		(0x0)

#define IPC_MEM_TYPE_MASK		(0x7 << 0)

#define IPC_VTT_STAT_SHIFT		(0x3)

#define IPC_VTT_STAT_MASK		(0x1 << 3)

#define IPC_VTT_GPIO_PIN_SHIFT		(0x4)

#define IPC_VTT_GPIO_PIN_MASK		(0x3f << 4)



#define M3_STATE_UNKNOWN		0

#define M3_STATE_RESET			1

#define M3_STATE_INITED			2
@@ -215,6 +222,12 @@ static int wkup_m3_is_available(struct wkup_m3_ipc *m3_ipc) 
		(m3_ipc->state != M3_STATE_UNKNOWN));

}



static void wkup_m3_set_vtt_gpio(struct wkup_m3_ipc *m3_ipc, int gpio)

{

	m3_ipc->vtt_conf = (1 << IPC_VTT_STAT_SHIFT) |

			    (gpio << IPC_VTT_GPIO_PIN_SHIFT);

}



/* Public functions */

/**

 * wkup_m3_set_mem_type - Pass wkup_m3 which type of memory is in use
@@ -294,7 +307,8 @@ static int wkup_m3_prepare_low_power(struct wkup_m3_ipc *m3_ipc, int state) 
	/* Program each required IPC register then write defaults to others */

	wkup_m3_ctrl_ipc_write(m3_ipc, m3_ipc->resume_addr, 0);

	wkup_m3_ctrl_ipc_write(m3_ipc, m3_power_state, 1);

	wkup_m3_ctrl_ipc_write(m3_ipc, m3_ipc->mem_type, 4);

	wkup_m3_ctrl_ipc_write(m3_ipc, m3_ipc->mem_type |

			       m3_ipc->vtt_conf, 4);



	wkup_m3_ctrl_ipc_write(m3_ipc, DS_IPC_DEFAULT, 2);

	wkup_m3_ctrl_ipc_write(m3_ipc, DS_IPC_DEFAULT, 3);
@@ -433,12 +447,13 @@ static int wkup_m3_rproc_boot_thread(void *arg) 
static int wkup_m3_ipc_probe(struct platform_device *pdev)

{

	struct device *dev = &pdev->dev;

	int irq, ret;

	int irq, ret, temp;

	phandle rproc_phandle;

	struct rproc *m3_rproc;

	struct resource *res;

	struct task_struct *task;

	struct wkup_m3_ipc *m3_ipc;

	struct device_node *np = dev->of_node;



	m3_ipc = devm_kzalloc(dev, sizeof(*m3_ipc), GFP_KERNEL);

	if (!m3_ipc)
@@ -494,6 +509,13 @@ static int wkup_m3_ipc_probe(struct platform_device *pdev) 


	m3_ipc->ops = &ipc_ops;



	if (!of_property_read_u32(np, "ti,vtt-gpio-pin", &temp)) {

		if (temp >= 0 && temp <= 31)

			wkup_m3_set_vtt_gpio(m3_ipc, temp);

		else

			dev_warn(dev, "Invalid VTT GPIO(%d) pin\n", temp);

	}



	/*

	 * Wait for firmware loading completion in a thread so we

	 * can boot the wkup_m3 as soon as it's ready without holding

include/linux/wkup_m3_ipc.h

+1 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ struct wkup_m3_ipc { 


	int mem_type;

	unsigned long resume_addr;

	int vtt_conf;

	int state;



	struct completion sync_complete;