Commit f1d33c90 authored by Kathiravan T's avatar Kathiravan T Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: ipq5332: add support for the RDP468 variant 



Add the initial device tree support for the Reference Design
Platform(RDP) 468 based on IPQ5332 family of SoCs. This patch carries the
support for Console UART, SPI NOR, eMMC.

Signed-off-by: default avatarKathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230323093120.20558-3-quic_kathirav@quicinc.com
parent a9e76cf1

arch/arm64/boot/dts/qcom/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8094-sony-xperia-kitakami-karin_windy.dtb 
dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-db820c.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-ifc6640.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-mi01.2.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-rdp468.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= ipq6018-cp01-c1.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= ipq8074-hk01.dtb

dtb-$(CONFIG_ARCH_QCOM)	+= ipq8074-hk10-c1.dtb

arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts

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// SPDX-License-Identifier: BSD-3-Clause

/*

 * IPQ5332 RDP468 board device tree source

 *

 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.

 */



/dts-v1/;



#include "ipq5332.dtsi"



/ {

	model = "Qualcomm Technologies, Inc. IPQ5332 MI01.6";

	compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332";



	aliases {

		serial0 = &blsp1_uart0;

	};



	chosen {

		stdout-path = "serial0";

	};

};



&blsp1_uart0 {

	pinctrl-0 = <&serial_0_pins>;

	pinctrl-names = "default";

	status = "okay";

};



&blsp1_spi0 {

	pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;

	pinctrl-names = "default";

	status = "okay";



	flash@0 {

		compatible = "micron,n25q128a11", "jedec,spi-nor";

		reg = <0>;

		#address-cells = <1>;

		#size-cells = <1>;

		spi-max-frequency = <50000000>;

	};

};



&sdhc {

	bus-width = <4>;

	max-frequency = <192000000>;

	mmc-ddr-1_8v;

	mmc-hs200-1_8v;

	non-removable;

	pinctrl-0 = <&sdc_default_state>;

	pinctrl-names = "default";

	status = "okay";

};



&sleep_clk {

	clock-frequency = <32000>;

};



&xo_board {

	clock-frequency = <24000000>;

};



/* PINCTRL */



&tlmm {

	sdc_default_state: sdc-default-state {

		clk-pins {

			pins = "gpio13";

			function = "sdc_clk";

			drive-strength = <8>;

			bias-disable;

		};



		cmd-pins {

			pins = "gpio12";

			function = "sdc_cmd";

			drive-strength = <8>;

			bias-pull-up;

		};



		data-pins {

			pins = "gpio8", "gpio9", "gpio10", "gpio11";

			function = "sdc_data";

			drive-strength = <8>;

			bias-pull-up;

		};

	};



	spi_0_data_clk_pins: spi-0-data-clk-state {

		pins = "gpio14", "gpio15", "gpio16";

		function = "blsp0_spi";

		drive-strength = <2>;

		bias-pull-down;

	};



	spi_0_cs_pins: spi-0-cs-state {

		pins = "gpio17";

		function = "blsp0_spi";

		drive-strength = <2>;

		bias-pull-up;

	};

};