Commit f1cc6c3f authored by Swapnil Jakhade's avatar Swapnil Jakhade Committed by Vinod Koul
Browse files

phy: cadence: Sierra: Check cmn_ready assertion during PHY power on 



Check if PMA cmn_ready is set indicating the startup process is complete.

Signed-off-by: default avatarSwapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: default avatarAswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20211223060137.9252-9-sjakhade@cadence.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent fa105172

drivers/phy/cadence/phy-cadence-sierra.c

+45 −0
Original line number Diff line number Diff line
@@ -151,6 +151,11 @@ 
#define SIERRA_PHY_PIPE_CMN_CTRL1			0x0

#define SIERRA_PHY_PLL_CFG				0xe



/* PHY PMA common registers */

#define SIERRA_PHY_PMA_COMMON_OFFSET(block_offset)	\

				     (0xE000 << (block_offset))

#define SIERRA_PHY_PMA_CMN_CTRL				0x000



#define SIERRA_MACRO_ID					0x00007364

#define SIERRA_MAX_LANES				16

#define PLL_LOCK_TIME					100000
@@ -172,6 +177,8 @@ static const struct reg_field macro_id_type = 
				REG_FIELD(SIERRA_MACRO_ID_REG, 0, 15);

static const struct reg_field phy_pll_cfg_1 =

				REG_FIELD(SIERRA_PHY_PLL_CFG, 1, 1);

static const struct reg_field pma_cmn_ready =

				REG_FIELD(SIERRA_PHY_PMA_CMN_CTRL, 0, 0);

static const struct reg_field pllctrl_lock =

				REG_FIELD(SIERRA_PLLCTRL_STATUS_PREG, 0, 0);
@@ -280,9 +287,11 @@ struct cdns_sierra_phy { 
	struct reset_control *apb_rst;

	struct regmap *regmap_lane_cdb[SIERRA_MAX_LANES];

	struct regmap *regmap_phy_pcs_common_cdb;

	struct regmap *regmap_phy_pma_common_cdb;

	struct regmap *regmap_common_cdb;

	struct regmap_field *macro_id_type;

	struct regmap_field *phy_pll_cfg_1;

	struct regmap_field *pma_cmn_ready;

	struct regmap_field *pllctrl_lock[SIERRA_MAX_LANES];

	struct regmap_field *cmn_refrcv_refclk_plllc1en_preg[SIERRA_NUM_CMN_PLLC];

	struct regmap_field *cmn_refrcv_refclk_termen_preg[SIERRA_NUM_CMN_PLLC];
@@ -358,6 +367,14 @@ static const struct regmap_config cdns_sierra_phy_pcs_cmn_cdb_config = { 
	.reg_read = cdns_regmap_read,

};



static const struct regmap_config cdns_sierra_phy_pma_cmn_cdb_config = {

	.name = "sierra_phy_pma_cmn_cdb",

	.reg_stride = 1,

	.fast_io = true,

	.reg_write = cdns_regmap_write,

	.reg_read = cdns_regmap_read,

};



static int cdns_sierra_phy_init(struct phy *gphy)

{

	struct cdns_sierra_inst *ins = phy_get_drvdata(gphy);
@@ -435,6 +452,17 @@ static int cdns_sierra_phy_on(struct phy *gphy) 
		return ret;

	}



	/*

	 * Wait for cmn_ready assertion

	 * PHY_PMA_CMN_CTRL[0] == 1

	 */

	ret = regmap_field_read_poll_timeout(sp->pma_cmn_ready, val, val,

					     1000, PLL_LOCK_TIME);

	if (ret) {

		dev_err(dev, "Timeout waiting for CMN ready\n");

		return ret;

	}



	ret = regmap_field_read_poll_timeout(sp->pllctrl_lock[ins->mlane],

					     val, val, 1000, PLL_LOCK_TIME);

	if (ret < 0)
@@ -712,6 +740,14 @@ static int cdns_regfield_init(struct cdns_sierra_phy *sp) 
	}

	sp->phy_pll_cfg_1 = field;



	regmap = sp->regmap_phy_pma_common_cdb;

	field = devm_regmap_field_alloc(dev, regmap, pma_cmn_ready);

	if (IS_ERR(field)) {

		dev_err(dev, "PHY_PMA_CMN_CTRL reg field init failed\n");

		return PTR_ERR(field);

	}

	sp->pma_cmn_ready = field;



	for (i = 0; i < SIERRA_MAX_LANES; i++) {

		regmap = sp->regmap_lane_cdb[i];

		field = devm_regmap_field_alloc(dev, regmap, pllctrl_lock);
@@ -765,6 +801,15 @@ static int cdns_regmap_init_blocks(struct cdns_sierra_phy *sp, 
	}

	sp->regmap_phy_pcs_common_cdb = regmap;



	block_offset = SIERRA_PHY_PMA_COMMON_OFFSET(block_offset_shift);

	regmap = cdns_regmap_init(dev, base, block_offset, reg_offset_shift,

				  &cdns_sierra_phy_pma_cmn_cdb_config);

	if (IS_ERR(regmap)) {

		dev_err(dev, "Failed to init PHY PMA common CDB regmap\n");

		return PTR_ERR(regmap);

	}

	sp->regmap_phy_pma_common_cdb = regmap;



	return 0;

}