Commit f17b1687 authored Jun 08, 2022 by Chang S. Bae Committed by Borislav Petkov Jul 19, 2022

x86/fpu: Add a helper to prepare AMX state for low-power CPU idle



When a CPU enters an idle state, a non-initialized AMX register state may
be the cause of preventing a deeper low-power state. Other extended
register states whether initialized or not do not impact the CPU idle
state.

The new helper can ensure the AMX state is initialized before the CPU is
idle, and it will be used by the intel idle driver.

Check the AMX_TILE feature bit before using XGETBV1 as a chain of
dependencies was established via cpuid_deps[]: AMX->XFD->XGETBV1.

Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20220608164748.11864-2-chang.seok.bae@intel.com

parent ff699273

arch/x86/include/asm/fpu/api.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -164,4 +164,6 @@ static inline bool fpstate_is_confidential(struct fpu_guest *gfpu)
		/* prctl */
		extern long fpu_xstate_prctl(int option, unsigned long arg2);

		extern void fpu_idle_fpregs(void);

		#endif /* _ASM_X86_FPU_API_H */

arch/x86/include/asm/special_insns.h

+9 −0

Original line number	Diff line number	Diff line
		@@ -295,6 +295,15 @@ static inline int enqcmds(void __iomem dst, const void src)
		return 0;
		}

		static inline void tile_release(void)
		{
		/*
		* Instruction opcode for TILERELEASE; supported in binutils
		* version >= 2.36.
		*/
		asm volatile(".byte 0xc4, 0xe2, 0x78, 0x49, 0xc0");
		}

		#endif /* __KERNEL__ */

		#endif /* _ASM_X86_SPECIAL_INSNS_H */

arch/x86/kernel/fpu/core.c

+14 −0

Original line number	Diff line number	Diff line
		@@ -851,3 +851,17 @@ int fpu__exception_code(struct fpu *fpu, int trap_nr)
		*/
		return 0;
		}

		/*
		* Initialize register state that may prevent from entering low-power idle.
		* This function will be invoked from the cpuidle driver only when needed.
		*/
		void fpu_idle_fpregs(void)
		{
		/* Note: AMX_TILE being enabled implies XGETBV1 support */
		if (cpu_feature_enabled(X86_FEATURE_AMX_TILE) &&
		(xfeatures_in_use() & XFEATURE_MASK_XTILE)) {
		tile_release();
		fpregs_deactivate(&current->thread.fpu);
		}
		}