Commit f1741615 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: get VCN harvest information from IP discovery table 



Use the table rather than asic specific harvest registers.

v2: remove harvesting register checking

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1b592d00

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+4 −0
Original line number Diff line number Diff line
@@ -470,6 +470,10 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) 
		switch (le32_to_cpu(harvest_info->list[i].hw_id)) {

		case VCN_HWID:

			vcn_harvest_count++;

			if (harvest_info->list[i].number_instance == 0)

				adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN0;

			else

				adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1;

			break;

		case DMU_HWID:

			adev->harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK;

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

+4 −15
Original line number Diff line number Diff line
@@ -87,7 +87,6 @@ static void vcn_v3_0_enc_ring_set_wptr(struct amdgpu_ring *ring); 
static int vcn_v3_0_early_init(void *handle)

{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;

	int i;



	if (amdgpu_sriov_vf(adev)) {

		adev->vcn.num_vcn_inst = VCN_INSTANCES_SIENNA_CICHLID;
@@ -95,20 +94,10 @@ static int vcn_v3_0_early_init(void *handle) 
		adev->vcn.num_enc_rings = 1;



	} else {

		if (adev->ip_versions[UVD_HWIP] == IP_VERSION(3, 0, 0)) {

			u32 harvest;



			for (i = 0; i < adev->vcn.num_vcn_inst; i++) {

				harvest = RREG32_SOC15(VCN, i, mmCC_UVD_HARVESTING);

				if (harvest & CC_UVD_HARVESTING__UVD_DISABLE_MASK)

					adev->vcn.harvest_config |= 1 << i;

			}



		if (adev->vcn.harvest_config == (AMDGPU_VCN_HARVEST_VCN0 |

						 AMDGPU_VCN_HARVEST_VCN1))

			/* both instances are harvested, disable the block */

			return -ENOENT;

		}



		if (adev->ip_versions[UVD_HWIP] == IP_VERSION(3, 0, 33))

			adev->vcn.num_enc_rings = 0;