Unverified Commit f13ace22 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!6065 v4 arm64 bpf trampoline for olk-5.10 

Merge Pull Request from: @ci-robot 
 
PR sync from: Pu Lehui <pulehui@huawei.com>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/ZL3RNMG75JWA6B4J4O7KT4KQNXCTT75U/ 
Alexander Duyck (1):
  bpf, arm64: Fix BTI type used for freplace attached functions

Nathan Chancellor (1):
  bpf, arm64: Mark dummy_tramp as global

Peter Zijlstra (1):
  x86/ibt,ftrace: Search for __fentry__ location

Pu Lehui (1):
  config: Enable DYNAMIC_FTRACE_WITH_DIRECT_CALLS

Xu Kuohai (13):
  arm64, insn: Add ldr/str with immediate offset
  bpf, arm64: Optimize BPF store/load using arm64 str/ldr(immediate
    offset)
  bpf, arm64: Adjust the offset of str/ldr(immediate) to positive number
  arm64: Add LDR (literal) instruction
  bpf, arm64: Implement bpf_arch_text_poke() for arm64
  bpf, arm64: Add bpf trampoline for arm64
  bpf, arm64: Fix compile error in dummy_tramp()
  bpf, arm64: Fix bpf trampoline instruction endianness
  bpf, arm64: Fixed a BTI error on returning to patched function
  ftrace: Allow users to disable ftrace direct call
  arm64: ftrace: Support long jump for ftrace direct call
  arm64: ftrace: Add ftrace direct call support
  arm64: ftrace: Support direct call for no literal module functions


-- 
2.34.1
 
https://gitee.com/openeuler/kernel/issues/I9FGRE 
 
Link:https://gitee.com/openeuler/kernel/pulls/6065

 

Reviewed-by: default avatarXu Kuohai <xukuohai@huawei.com>
Signed-off-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
parents 39820fdf 2840dcf3

arch/arm64/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -170,6 +170,8 @@ config ARM64 
	select HAVE_DYNAMIC_FTRACE

	select HAVE_DYNAMIC_FTRACE_WITH_REGS \

		if $(cc-option,-fpatchable-function-entry=2)

	select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS \

		if DYNAMIC_FTRACE_WITH_REGS

	select HAVE_EFFICIENT_UNALIGNED_ACCESS

	select HAVE_FAST_GUP

	select HAVE_FTRACE_MCOUNT_RECORD

arch/arm64/Makefile

+4 −0
Original line number Diff line number Diff line
@@ -128,8 +128,12 @@ CHECKFLAGS += -D__aarch64__ 


ifeq ($(CONFIG_DYNAMIC_FTRACE_WITH_REGS),y)

  KBUILD_CPPFLAGS += -DCC_USING_PATCHABLE_FUNCTION_ENTRY

  ifeq ($(CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS),y)

  CC_FLAGS_FTRACE := -fpatchable-function-entry=7,5

  else

  CC_FLAGS_FTRACE := -fpatchable-function-entry=2

  endif

endif



# Default value

head-y		:= arch/arm64/kernel/head.o

arch/arm64/configs/openeuler_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -7339,6 +7339,7 @@ CONFIG_FUNCTION_TRACER=y 
CONFIG_FUNCTION_GRAPH_TRACER=y

CONFIG_DYNAMIC_FTRACE=y

CONFIG_DYNAMIC_FTRACE_WITH_REGS=y

CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y

CONFIG_FUNCTION_PROFILER=y

CONFIG_STACK_TRACER=y

# CONFIG_IRQSOFF_TRACER is not set

arch/arm64/include/asm/ftrace.h

+20 −11
Original line number Diff line number Diff line
@@ -45,27 +45,28 @@ extern void _mcount(unsigned long); 
extern void *return_address(unsigned int);



struct dyn_arch_ftrace {

	/* No extra data needed for arm64 */

#ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS

	unsigned long func; /* start address of function */

#endif

};



extern unsigned long ftrace_graph_call;



extern void return_to_handler(void);



static inline unsigned long ftrace_call_adjust(unsigned long addr)

unsigned long ftrace_call_adjust(unsigned long addr);



#ifdef CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS

static inline void arch_ftrace_set_direct_caller(struct pt_regs *regs,

						 unsigned long addr)

{

	/*

	 * Adjust addr to point at the BL in the callsite.

	 * See ftrace_init_nop() for the callsite sequence.

	 */

	if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_REGS))

		return addr + AARCH64_INSN_SIZE;

	/*

	 * addr is the address of the mcount call instruction.

	 * recordmcount does the necessary offset calculation.

	 * Place custom trampoline address in regs->custom_tramp to let ftrace

	 * trampoline jump to it.

	 */

	return addr;

	regs->orig_x0 = addr;

}

#endif /* CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS */



#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS

struct dyn_ftrace;
@@ -103,6 +104,14 @@ static inline bool arch_syscall_match_sym_name(const char *sym, 
	 */

	return !strcmp(sym + 8, name);

}



#ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS



#define ftrace_dummy_tramp ftrace_dummy_tramp

extern void ftrace_dummy_tramp(void);



#endif /* CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS */



#endif /* ifndef __ASSEMBLY__ */



#endif /* __ASM_FTRACE_H */

arch/arm64/include/asm/insn.h

+14 −0
Original line number Diff line number Diff line
@@ -200,6 +200,8 @@ enum aarch64_insn_size_type { 
enum aarch64_insn_ldst_type {

	AARCH64_INSN_LDST_LOAD_REG_OFFSET,

	AARCH64_INSN_LDST_STORE_REG_OFFSET,

	AARCH64_INSN_LDST_LOAD_IMM_OFFSET,

	AARCH64_INSN_LDST_STORE_IMM_OFFSET,

	AARCH64_INSN_LDST_LOAD_PAIR_PRE_INDEX,

	AARCH64_INSN_LDST_STORE_PAIR_PRE_INDEX,

	AARCH64_INSN_LDST_LOAD_PAIR_POST_INDEX,
@@ -296,8 +298,10 @@ __AARCH64_INSN_FUNCS(adrp, 0x9F000000, 0x90000000) 
__AARCH64_INSN_FUNCS(prfm,	0x3FC00000, 0x39800000)

__AARCH64_INSN_FUNCS(prfm_lit,	0xFF000000, 0xD8000000)

__AARCH64_INSN_FUNCS(str_reg,	0x3FE0EC00, 0x38206800)

__AARCH64_INSN_FUNCS(str_imm,	0x3FC00000, 0x39000000)

__AARCH64_INSN_FUNCS(ldadd,	0x3F20FC00, 0x38200000)

__AARCH64_INSN_FUNCS(ldr_reg,	0x3FE0EC00, 0x38606800)

__AARCH64_INSN_FUNCS(ldr_imm,	0x3FC00000, 0x39400000)

__AARCH64_INSN_FUNCS(ldr_lit,	0xBF000000, 0x18000000)

__AARCH64_INSN_FUNCS(ldrsw_lit,	0xFF000000, 0x98000000)

__AARCH64_INSN_FUNCS(exclusive,	0x3F800000, 0x08000000)
@@ -407,6 +411,14 @@ u32 aarch64_insn_gen_load_store_reg(enum aarch64_insn_register reg, 
				    enum aarch64_insn_register offset,

				    enum aarch64_insn_size_type size,

				    enum aarch64_insn_ldst_type type);

u32 aarch64_insn_gen_load_store_imm(enum aarch64_insn_register reg,

				    enum aarch64_insn_register base,

				    unsigned int imm,

				    enum aarch64_insn_size_type size,

				    enum aarch64_insn_ldst_type type);

u32 aarch64_insn_gen_load_literal(unsigned long pc, unsigned long addr,

				  enum aarch64_insn_register reg,

				  bool is64bit);

u32 aarch64_insn_gen_load_store_pair(enum aarch64_insn_register reg1,

				     enum aarch64_insn_register reg2,

				     enum aarch64_insn_register base,
@@ -491,6 +503,8 @@ u32 aarch64_set_branch_offset(u32 insn, s32 offset); 
int aarch64_insn_patch_text_nosync(void *addr, u32 insn);

int aarch64_insn_patch_text(void *addrs[], u32 insns[], int cnt);



void aarch64_literal64_write(void *addr, u64 data);



s32 aarch64_insn_adrp_get_offset(u32 insn);

u32 aarch64_insn_adrp_set_offset(u32 insn, s32 offset);