Commit f1006257 authored by Chris Metcalf's avatar Chris Metcalf
Browse files

bounce: allow use of bounce pool via config option 



The tilegx USB OHCI support needs the bounce pool since we're not
using the IOMMU to handle 32-bit addresses.

Signed-off-by: default avatarChris Metcalf <cmetcalf@tilera.com>
parent 47fc28bf

arch/tile/Kconfig

+6 −0
Original line number Diff line number Diff line
@@ -406,6 +406,12 @@ config TILE_USB 
	  Provides USB host adapter support for the built-in EHCI and OHCI

	  interfaces on TILE-Gx chips.



# USB OHCI needs the bounce pool since tilegx will often have more

# than 4GB of memory, but we don't currently use the IOTLB to present

# a 32-bit address to OHCI.  So we need to use a bounce pool instead.

config NEED_BOUNCE_POOL

	def_bool USB_OHCI_HCD



config HOTPLUG

	bool "Support for hot-pluggable devices"

	---help---

mm/bounce.c

+5 −3
Original line number Diff line number Diff line
@@ -24,23 +24,25 @@ 


static mempool_t *page_pool, *isa_page_pool;



#ifdef CONFIG_HIGHMEM

#if defined(CONFIG_HIGHMEM) || defined(CONFIG_NEED_BOUNCE_POOL)

static __init int init_emergency_pool(void)

{

#ifndef CONFIG_MEMORY_HOTPLUG

#if defined(CONFIG_HIGHMEM) && !defined(CONFIG_MEMORY_HOTPLUG)

	if (max_pfn <= max_low_pfn)

		return 0;

#endif



	page_pool = mempool_create_page_pool(POOL_SIZE, 0);

	BUG_ON(!page_pool);

	printk("highmem bounce pool size: %d pages\n", POOL_SIZE);

	printk("bounce pool size: %d pages\n", POOL_SIZE);



	return 0;

}



__initcall(init_emergency_pool);

#endif



#ifdef CONFIG_HIGHMEM

/*

 * highmem version, map in to vec

 */