Commit f0e2f00c authored by Matt Roper's avatar Matt Roper Committed by Joonas Lahtinen
Browse files

drm/i915/xelpmp: Expose media as another GT 



Xe_LPM+ platforms have "standalone media."  I.e., the media unit is
designed as an additional GT with its own engine list, GuC, forcewake,
etc.  Let's allow platforms to include media GTs in their device info.

v2:
 - Simplify GSI register handling and split it out to a separate patch
   for ease of review.  (Daniele)

Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarAravind Iddamsetty <aravind.iddamsetty@intel.com>
Acked-by: default avatarAravind Iddamsetty <aravind.iddamsetty@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-13-matthew.d.roper@intel.com


Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
parent 29063c6a

drivers/gpu/drm/i915/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -123,6 +123,7 @@ gt-y += \ 
	gt/intel_ring.o \

	gt/intel_ring_submission.o \

	gt/intel_rps.o \

	gt/intel_sa_media.o \

	gt/intel_sseu.o \

	gt/intel_sseu_debugfs.o \

	gt/intel_timeline.o \

drivers/gpu/drm/i915/gt/intel_gt.c

+6 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
#include "intel_rc6.h"

#include "intel_renderstate.h"

#include "intel_rps.h"

#include "intel_sa_media.h"

#include "intel_gt_sysfs.h"

#include "intel_uncore.h"

#include "shmem_utils.h"
@@ -863,6 +864,11 @@ int intel_gt_probe_all(struct drm_i915_private *i915) 
			ret = intel_gt_tile_setup(gt, phys_addr + gtdef->mapping_base);

			break;



		case GT_MEDIA:

			ret = intel_sa_mediagt_setup(gt, phys_addr + gtdef->mapping_base,

						     gtdef->gsi_offset);

			break;



		case GT_PRIMARY:

			/* Primary GT should not appear in extra GT list */

		default:

drivers/gpu/drm/i915/gt/intel_gt_regs.h

+8 −0
Original line number Diff line number Diff line
@@ -1578,4 +1578,12 @@ 


#define GEN12_SFC_DONE(n)			_MMIO(0x1cc000 + (n) * 0x1000)



/*

 * Standalone Media's non-engine GT registers are located at their regular GT

 * offsets plus 0x380000.  This extra offset is stored inside the intel_uncore

 * structure so that the existing code can be used for both GTs without

 * modification.

 */

#define MTL_MEDIA_GSI_BASE			0x380000



#endif /* __INTEL_GT_REGS__ */

drivers/gpu/drm/i915/gt/intel_gt_types.h

+1 −0
Original line number Diff line number Diff line
@@ -84,6 +84,7 @@ struct gt_defaults { 
enum intel_gt_type {

	GT_PRIMARY,

	GT_TILE,

	GT_MEDIA,

};



struct intel_gt {

drivers/gpu/drm/i915/gt/intel_sa_media.c

0 → 100644
+39 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: MIT

/*

 * Copyright © 2021 Intel Corporation

 */



#include <drm/drm_managed.h>



#include "i915_drv.h"

#include "gt/intel_gt.h"

#include "gt/intel_sa_media.h"



int intel_sa_mediagt_setup(struct intel_gt *gt, phys_addr_t phys_addr,

			   u32 gsi_offset)

{

	struct drm_i915_private *i915 = gt->i915;

	struct intel_uncore *uncore;



	uncore = drmm_kzalloc(&i915->drm, sizeof(*uncore), GFP_KERNEL);

	if (!uncore)

		return -ENOMEM;



	uncore->gsi_offset = gsi_offset;



	intel_gt_common_init_early(gt);

	intel_uncore_init_early(uncore, gt);



	/*

	 * Standalone media shares the general MMIO space with the primary

	 * GT.  We'll re-use the primary GT's mapping.

	 */

	uncore->regs = i915->uncore.regs;

	if (drm_WARN_ON(&i915->drm, uncore->regs == NULL))

		return -EIO;



	gt->uncore = uncore;

	gt->phys_addr = phys_addr;



	return 0;

}