Commit f0dbca55 authored by Thierry Reding's avatar Thierry Reding
Browse files

Merge branch 'for-5.5/dt-bindings'

parents 54ecb8f7 cdc2d668

include/dt-bindings/clock/tegra124-car-common.h

+2 −1
Original line number Original line Diff line number Diff line
@@ -337,7 +337,8 @@ 
#define TEGRA124_CLK_CLK_OUT_3_MUX 308

#define TEGRA124_CLK_CLK_OUT_3_MUX 308

/* 309 */

/* 309 */

/* 310 */

/* 310 */

#define TEGRA124_CLK_SOR0_LVDS 311

#define TEGRA124_CLK_SOR0_LVDS 311 /* deprecated */

#define TEGRA124_CLK_SOR0_OUT 311

#define TEGRA124_CLK_XUSB_SS_DIV2 312

#define TEGRA124_CLK_XUSB_SS_DIV2 312





#define TEGRA124_CLK_PLL_M_UD 313

#define TEGRA124_CLK_PLL_M_UD 313

include/dt-bindings/clock/tegra210-car.h

+2 −1
Original line number Original line Diff line number Diff line
@@ -391,7 +391,8 @@ 
#define TEGRA210_CLK_CLK_OUT_3_MUX 358

#define TEGRA210_CLK_CLK_OUT_3_MUX 358

#define TEGRA210_CLK_DSIA_MUX 359

#define TEGRA210_CLK_DSIA_MUX 359

#define TEGRA210_CLK_DSIB_MUX 360

#define TEGRA210_CLK_DSIB_MUX 360

#define TEGRA210_CLK_SOR0_LVDS 361

#define TEGRA210_CLK_SOR0_LVDS 361 /* deprecated */

#define TEGRA210_CLK_SOR0_OUT 361

#define TEGRA210_CLK_XUSB_SS_DIV2 362

#define TEGRA210_CLK_XUSB_SS_DIV2 362





#define TEGRA210_CLK_PLL_M_UD 363

#define TEGRA210_CLK_PLL_M_UD 363