Commit f0c8234c authored by Takeshi Saito's avatar Takeshi Saito Committed by Ulf Hansson
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mmc: renesas_sdhi: Change HW adjustment register according to speed mode 



SCC is used for SDR104/HS200/HS400. We need to change SCC_DT2FF
according to the mode. If it is inappropriate, CRC error tends to occur.

This adds variable "tap_hs400" for HS400 mode and configures SCC_DT2FF
as needed.

Signed-off-by: default avatarTakeshi Saito <takeshi.saito.xv@renesas.com>
[wsa: rebased to upstream and updated commit message]
Signed-off-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund@ragnatech.se>
Tested-by: default avatarMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent e9968c6f

drivers/mmc/host/renesas_sdhi.h

+2 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
struct renesas_sdhi_scc {

	unsigned long clk_rate;	/* clock rate for SDR104 */

	u32 tap;		/* sampling clock position for SDR104 */

	u32 tap_hs400;		/* sampling clock position for HS400 */

};



struct renesas_sdhi_of_data {
@@ -49,6 +50,7 @@ struct renesas_sdhi { 
	struct pinctrl_state *pins_default, *pins_uhs;

	void __iomem *scc_ctl;

	u32 scc_tappos;

	u32 scc_tappos_hs400;

};



#define host_to_priv(host) \

drivers/mmc/host/renesas_sdhi_core.c

+8 −0
Original line number Diff line number Diff line
@@ -337,6 +337,10 @@ static void renesas_sdhi_hs400_complete(struct tmio_mmc_host *host) 
	/* Set HS400 mode */

	sd_ctrl_write16(host, CTL_SDIF_MODE, 0x0001 |

			sd_ctrl_read16(host, CTL_SDIF_MODE));



	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF,

		       priv->scc_tappos_hs400);



	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TMPPORT2,

		       (SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN |

			SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL) |
@@ -396,6 +400,9 @@ static void renesas_sdhi_reset_hs400_mode(struct tmio_mmc_host *host, 
	/* Reset HS400 mode */

	sd_ctrl_write16(host, CTL_SDIF_MODE, ~0x0001 &

			sd_ctrl_read16(host, CTL_SDIF_MODE));



	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, priv->scc_tappos);



	sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TMPPORT2,

		       ~(SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN |

			 SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL) &
@@ -786,6 +793,7 @@ int renesas_sdhi_probe(struct platform_device *pdev, 
			if (taps[i].clk_rate == 0 ||

			    taps[i].clk_rate == host->mmc->f_max) {

				priv->scc_tappos = taps->tap;

				priv->scc_tappos_hs400 = taps->tap_hs400;

				hit = true;

				break;

			}

drivers/mmc/host/renesas_sdhi_internal_dmac.c

+1 −0
Original line number Diff line number Diff line
@@ -81,6 +81,7 @@ static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = { 
	{

		.clk_rate = 0,

		.tap = 0x00000300,

		.tap_hs400 = 0x00000704,

	},

};