Loading sound/soc/sh/rcar/rsnd.h +31 −31 Original line number Diff line number Diff line Loading @@ -44,16 +44,16 @@ */ enum rsnd_reg { /* SCU (SRC/SSIU/MIX/CTU/DVC) */ RSND_REG_SSI_MODE, /* Gen2 only */ RSND_REG_SSI_MODE, RSND_REG_SSI_MODE0, RSND_REG_SSI_MODE1, RSND_REG_SSI_MODE2, RSND_REG_SSI_CONTROL, RSND_REG_SSI_CTRL, /* Gen2 only */ RSND_REG_SSI_BUSIF_MODE, /* Gen2 only */ RSND_REG_SSI_BUSIF_ADINR, /* Gen2 only */ RSND_REG_SSI_BUSIF_DALIGN, /* Gen2 only */ RSND_REG_SSI_INT_ENABLE, /* Gen2 only */ RSND_REG_SSI_CTRL, RSND_REG_SSI_BUSIF_MODE, RSND_REG_SSI_BUSIF_ADINR, RSND_REG_SSI_BUSIF_DALIGN, RSND_REG_SSI_INT_ENABLE, RSND_REG_SRC_I_BUSIF_MODE, RSND_REG_SRC_O_BUSIF_MODE, RSND_REG_SRC_ROUTE_MODE0, Loading @@ -63,29 +63,29 @@ enum rsnd_reg { RSND_REG_SRC_IFSCR, RSND_REG_SRC_IFSVR, RSND_REG_SRC_SRCCR, RSND_REG_SRC_CTRL, /* Gen2 only */ RSND_REG_SRC_BSDSR, /* Gen2 only */ RSND_REG_SRC_BSISR, /* Gen2 only */ RSND_REG_SRC_INT_ENABLE0, /* Gen2 only */ RSND_REG_SRC_BUSIF_DALIGN, /* Gen2 only */ RSND_REG_SRCIN_TIMSEL0, /* Gen2 only */ RSND_REG_SRCIN_TIMSEL1, /* Gen2 only */ RSND_REG_SRCIN_TIMSEL2, /* Gen2 only */ RSND_REG_SRCIN_TIMSEL3, /* Gen2 only */ RSND_REG_SRCIN_TIMSEL4, /* Gen2 only */ RSND_REG_SRCOUT_TIMSEL0, /* Gen2 only */ RSND_REG_SRCOUT_TIMSEL1, /* Gen2 only */ RSND_REG_SRCOUT_TIMSEL2, /* Gen2 only */ RSND_REG_SRCOUT_TIMSEL3, /* Gen2 only */ RSND_REG_SRCOUT_TIMSEL4, /* Gen2 only */ RSND_REG_SRC_CTRL, RSND_REG_SRC_BSDSR, RSND_REG_SRC_BSISR, RSND_REG_SRC_INT_ENABLE0, RSND_REG_SRC_BUSIF_DALIGN, RSND_REG_SRCIN_TIMSEL0, RSND_REG_SRCIN_TIMSEL1, RSND_REG_SRCIN_TIMSEL2, RSND_REG_SRCIN_TIMSEL3, RSND_REG_SRCIN_TIMSEL4, RSND_REG_SRCOUT_TIMSEL0, RSND_REG_SRCOUT_TIMSEL1, RSND_REG_SRCOUT_TIMSEL2, RSND_REG_SRCOUT_TIMSEL3, RSND_REG_SRCOUT_TIMSEL4, RSND_REG_SCU_SYS_STATUS0, RSND_REG_SCU_SYS_STATUS1, /* Gen2 only */ RSND_REG_SCU_SYS_STATUS1, RSND_REG_SCU_SYS_INT_EN0, RSND_REG_SCU_SYS_INT_EN1, /* Gen2 only */ RSND_REG_CMD_CTRL, /* Gen2 only */ RSND_REG_CMD_BUSIF_DALIGN, /* Gen2 only */ RSND_REG_SCU_SYS_INT_EN1, RSND_REG_CMD_CTRL, RSND_REG_CMD_BUSIF_DALIGN, RSND_REG_CMD_ROUTE_SLCT, RSND_REG_CMDOUT_TIMSEL, /* Gen2 only */ RSND_REG_CMDOUT_TIMSEL, RSND_REG_CTU_SWRSR, RSND_REG_CTU_CTUIR, RSND_REG_CTU_ADINR, Loading Loading @@ -147,18 +147,18 @@ enum rsnd_reg { RSND_REG_DVC_VOL6R, RSND_REG_DVC_VOL7R, RSND_REG_DVC_DVUER, RSND_REG_DVC_VRCTR, /* Gen2 only */ RSND_REG_DVC_VRPDR, /* Gen2 only */ RSND_REG_DVC_VRDBR, /* Gen2 only */ RSND_REG_DVC_VRCTR, RSND_REG_DVC_VRPDR, RSND_REG_DVC_VRDBR, /* ADG */ RSND_REG_BRRA, RSND_REG_BRRB, RSND_REG_SSICKR, RSND_REG_DIV_EN, /* Gen2 only */ RSND_REG_DIV_EN, RSND_REG_AUDIO_CLK_SEL0, RSND_REG_AUDIO_CLK_SEL1, RSND_REG_AUDIO_CLK_SEL2, /* Gen2 only */ RSND_REG_AUDIO_CLK_SEL2, /* SSI */ RSND_REG_SSICR, Loading Loading
sound/soc/sh/rcar/rsnd.h +31 −31 Original line number Diff line number Diff line Loading @@ -44,16 +44,16 @@ */ enum rsnd_reg { /* SCU (SRC/SSIU/MIX/CTU/DVC) */ RSND_REG_SSI_MODE, /* Gen2 only */ RSND_REG_SSI_MODE, RSND_REG_SSI_MODE0, RSND_REG_SSI_MODE1, RSND_REG_SSI_MODE2, RSND_REG_SSI_CONTROL, RSND_REG_SSI_CTRL, /* Gen2 only */ RSND_REG_SSI_BUSIF_MODE, /* Gen2 only */ RSND_REG_SSI_BUSIF_ADINR, /* Gen2 only */ RSND_REG_SSI_BUSIF_DALIGN, /* Gen2 only */ RSND_REG_SSI_INT_ENABLE, /* Gen2 only */ RSND_REG_SSI_CTRL, RSND_REG_SSI_BUSIF_MODE, RSND_REG_SSI_BUSIF_ADINR, RSND_REG_SSI_BUSIF_DALIGN, RSND_REG_SSI_INT_ENABLE, RSND_REG_SRC_I_BUSIF_MODE, RSND_REG_SRC_O_BUSIF_MODE, RSND_REG_SRC_ROUTE_MODE0, Loading @@ -63,29 +63,29 @@ enum rsnd_reg { RSND_REG_SRC_IFSCR, RSND_REG_SRC_IFSVR, RSND_REG_SRC_SRCCR, RSND_REG_SRC_CTRL, /* Gen2 only */ RSND_REG_SRC_BSDSR, /* Gen2 only */ RSND_REG_SRC_BSISR, /* Gen2 only */ RSND_REG_SRC_INT_ENABLE0, /* Gen2 only */ RSND_REG_SRC_BUSIF_DALIGN, /* Gen2 only */ RSND_REG_SRCIN_TIMSEL0, /* Gen2 only */ RSND_REG_SRCIN_TIMSEL1, /* Gen2 only */ RSND_REG_SRCIN_TIMSEL2, /* Gen2 only */ RSND_REG_SRCIN_TIMSEL3, /* Gen2 only */ RSND_REG_SRCIN_TIMSEL4, /* Gen2 only */ RSND_REG_SRCOUT_TIMSEL0, /* Gen2 only */ RSND_REG_SRCOUT_TIMSEL1, /* Gen2 only */ RSND_REG_SRCOUT_TIMSEL2, /* Gen2 only */ RSND_REG_SRCOUT_TIMSEL3, /* Gen2 only */ RSND_REG_SRCOUT_TIMSEL4, /* Gen2 only */ RSND_REG_SRC_CTRL, RSND_REG_SRC_BSDSR, RSND_REG_SRC_BSISR, RSND_REG_SRC_INT_ENABLE0, RSND_REG_SRC_BUSIF_DALIGN, RSND_REG_SRCIN_TIMSEL0, RSND_REG_SRCIN_TIMSEL1, RSND_REG_SRCIN_TIMSEL2, RSND_REG_SRCIN_TIMSEL3, RSND_REG_SRCIN_TIMSEL4, RSND_REG_SRCOUT_TIMSEL0, RSND_REG_SRCOUT_TIMSEL1, RSND_REG_SRCOUT_TIMSEL2, RSND_REG_SRCOUT_TIMSEL3, RSND_REG_SRCOUT_TIMSEL4, RSND_REG_SCU_SYS_STATUS0, RSND_REG_SCU_SYS_STATUS1, /* Gen2 only */ RSND_REG_SCU_SYS_STATUS1, RSND_REG_SCU_SYS_INT_EN0, RSND_REG_SCU_SYS_INT_EN1, /* Gen2 only */ RSND_REG_CMD_CTRL, /* Gen2 only */ RSND_REG_CMD_BUSIF_DALIGN, /* Gen2 only */ RSND_REG_SCU_SYS_INT_EN1, RSND_REG_CMD_CTRL, RSND_REG_CMD_BUSIF_DALIGN, RSND_REG_CMD_ROUTE_SLCT, RSND_REG_CMDOUT_TIMSEL, /* Gen2 only */ RSND_REG_CMDOUT_TIMSEL, RSND_REG_CTU_SWRSR, RSND_REG_CTU_CTUIR, RSND_REG_CTU_ADINR, Loading Loading @@ -147,18 +147,18 @@ enum rsnd_reg { RSND_REG_DVC_VOL6R, RSND_REG_DVC_VOL7R, RSND_REG_DVC_DVUER, RSND_REG_DVC_VRCTR, /* Gen2 only */ RSND_REG_DVC_VRPDR, /* Gen2 only */ RSND_REG_DVC_VRDBR, /* Gen2 only */ RSND_REG_DVC_VRCTR, RSND_REG_DVC_VRPDR, RSND_REG_DVC_VRDBR, /* ADG */ RSND_REG_BRRA, RSND_REG_BRRB, RSND_REG_SSICKR, RSND_REG_DIV_EN, /* Gen2 only */ RSND_REG_DIV_EN, RSND_REG_AUDIO_CLK_SEL0, RSND_REG_AUDIO_CLK_SEL1, RSND_REG_AUDIO_CLK_SEL2, /* Gen2 only */ RSND_REG_AUDIO_CLK_SEL2, /* SSI */ RSND_REG_SSICR, Loading