Commit f05f4fe6 authored by Prike Liang's avatar Prike Liang Committed by Alex Deucher
Browse files

drm/amdgpu: enable SDMA MGCG for SDMA 5.2.x 



Now the SDMA firmware can support SDMA MGCG properly,
so let's enable it from the driver side.

Signed-off-by: default avatarPrike Liang <Prike.Liang@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6fc9d92c

drivers/gpu/drm/amd/amdgpu/nv.c

+4 −2
Original line number Diff line number Diff line
@@ -889,7 +889,8 @@ static int nv_common_early_init(void *handle) 
			AMD_CG_SUPPORT_ATHUB_LS |

			AMD_CG_SUPPORT_IH_CG |

			AMD_CG_SUPPORT_VCN_MGCG |

			AMD_CG_SUPPORT_JPEG_MGCG;

			AMD_CG_SUPPORT_JPEG_MGCG |

			AMD_CG_SUPPORT_SDMA_MGCG;

		adev->pg_flags = AMD_PG_SUPPORT_GFX_PG |

			AMD_PG_SUPPORT_VCN |

			AMD_PG_SUPPORT_VCN_DPG |
@@ -950,7 +951,8 @@ static int nv_common_early_init(void *handle) 
			AMD_CG_SUPPORT_ATHUB_LS |

			AMD_CG_SUPPORT_IH_CG |

			AMD_CG_SUPPORT_VCN_MGCG |

			AMD_CG_SUPPORT_JPEG_MGCG;

			AMD_CG_SUPPORT_JPEG_MGCG |

			AMD_CG_SUPPORT_SDMA_MGCG;

		adev->pg_flags = AMD_PG_SUPPORT_VCN |

			AMD_PG_SUPPORT_VCN_DPG |

			AMD_PG_SUPPORT_JPEG |

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

+26 −1
Original line number Diff line number Diff line
@@ -1507,6 +1507,30 @@ static int sdma_v5_2_process_illegal_inst_irq(struct amdgpu_device *adev, 
	return 0;

}



static bool sdma_v5_2_firmware_mgcg_support(struct amdgpu_device *adev,

						     int i)

{

	switch (adev->ip_versions[SDMA0_HWIP][0]) {

	case IP_VERSION(5, 2, 1):

		if (adev->sdma.instance[i].fw_version < 70)

			return false;

		break;

	case IP_VERSION(5, 2, 3):

		if (adev->sdma.instance[i].fw_version < 47)

			return false;

		break;

	case IP_VERSION(5, 2, 7):

		if (adev->sdma.instance[i].fw_version < 9)

			return false;

		break;

	default:

		return true;

	}



	return true;



}



static void sdma_v5_2_update_medium_grain_clock_gating(struct amdgpu_device *adev,

						       bool enable)

{
@@ -1515,7 +1539,7 @@ static void sdma_v5_2_update_medium_grain_clock_gating(struct amdgpu_device *ade 


	for (i = 0; i < adev->sdma.num_instances; i++) {



		if (adev->sdma.instance[i].fw_version < 70 && adev->ip_versions[SDMA0_HWIP][0] == IP_VERSION(5, 2, 1))

		if (!sdma_v5_2_firmware_mgcg_support(adev, i))

			adev->cg_flags &= ~AMD_CG_SUPPORT_SDMA_MGCG;



		if (enable && (adev->cg_flags & AMD_CG_SUPPORT_SDMA_MGCG)) {
@@ -1589,6 +1613,7 @@ static int sdma_v5_2_set_clockgating_state(void *handle, 
	case IP_VERSION(5, 2, 5):

	case IP_VERSION(5, 2, 6):

	case IP_VERSION(5, 2, 3):

	case IP_VERSION(5, 2, 7):

		sdma_v5_2_update_medium_grain_clock_gating(adev,

				state == AMD_CG_STATE_GATE);

		sdma_v5_2_update_medium_grain_light_sleep(adev,