Commit f05b1256 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Shawn Guo
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arm64: dts: imx8mq-hummingboard-pulse: Align pin configuration group names with schema



Device tree schema expects pin configuration groups to end with 'grp'
suffix, otherwise dtbs_check complain with a warning like:

    ... do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'

Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 32e67c15
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+4 −4
Original line number Diff line number Diff line
@@ -214,13 +214,13 @@
		>;
	};

	pinctrl_usdhc2_gpio: usdhc2grpgpio {
	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
		fsl,pins = <
			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x41
		>;
	};

	pinctrl_usdhc2_vmmc: usdhc2vmmcgpio {
	pinctrl_usdhc2_vmmc: usdhc2vmmcgpiogrp {
		fsl,pins = <
			MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x41
		>;
@@ -238,7 +238,7 @@
		>;
	};

	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
		fsl,pins = <
			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x8d
			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xcd
@@ -250,7 +250,7 @@
		>;
	};

	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
		fsl,pins = <
			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x9f
			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xdf