Commit efaeb5f9 authored by Stephen Boyd's avatar Stephen Boyd
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Merge tag 'clk-microchip-fixes-6.2' of...

Merge tag 'clk-microchip-fixes-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-fixes

Pull a Microchip clock fix from Claudiu Beznea:

Only one fix for Polarfire SoCs at this time as follows:
- replace devm_kzalloc() with devm_kasprintf(); this has been marked as
  fix to avoid having registered 2 clocks with the same or invalid name in
  case device tree node addresses will be longer such that clocks
  registered with name patern "ccc<node_address>_pll<N>" will exeed the
  allocated space.

* tag 'clk-microchip-fixes-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  clk: microchip: mpfs-ccc: Use devm_kasprintf() for allocating formatted strings
parents 1b929c02 86d884f5
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+4 −6
Original line number Diff line number Diff line
@@ -164,12 +164,11 @@ static int mpfs_ccc_register_outputs(struct device *dev, struct mpfs_ccc_out_hw_

	for (unsigned int i = 0; i < num_clks; i++) {
		struct mpfs_ccc_out_hw_clock *out_hw = &out_hws[i];
		char *name = devm_kzalloc(dev, 23, GFP_KERNEL);
		char *name = devm_kasprintf(dev, GFP_KERNEL, "%s_out%u", parent->name, i);

		if (!name)
			return -ENOMEM;

		snprintf(name, 23, "%s_out%u", parent->name, i);
		out_hw->divider.hw.init = CLK_HW_INIT_HW(name, &parent->hw, &clk_divider_ops, 0);
		out_hw->divider.reg = data->pll_base[i / MPFS_CCC_OUTPUTS_PER_PLL] +
			out_hw->reg_offset;
@@ -201,14 +200,13 @@ static int mpfs_ccc_register_plls(struct device *dev, struct mpfs_ccc_pll_hw_clo

	for (unsigned int i = 0; i < num_clks; i++) {
		struct mpfs_ccc_pll_hw_clock *pll_hw = &pll_hws[i];
		char *name = devm_kzalloc(dev, 18, GFP_KERNEL);

		if (!name)
		pll_hw->name = devm_kasprintf(dev, GFP_KERNEL, "ccc%s_pll%u",
					      strchrnul(dev->of_node->full_name, '@'), i);
		if (!pll_hw->name)
			return -ENOMEM;

		pll_hw->base = data->pll_base[i];
		snprintf(name, 18, "ccc%s_pll%u", strchrnul(dev->of_node->full_name, '@'), i);
		pll_hw->name = (const char *)name;
		pll_hw->hw.init = CLK_HW_INIT_PARENTS_DATA_FIXED_SIZE(pll_hw->name,
								      pll_hw->parents,
								      &mpfs_ccc_pll_ops, 0);