Commit ef8c373b authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by David S. Miller
Browse files

net: ethernet: mtk_eth_soc: fix RSTCTRL_PPE{0,1} definitions 



Fix RSTCTRL_PPE0 and RSTCTRL_PPE1 register mask definitions for
MTK_NETSYS_V2.
Remove duplicated definitions.

Fixes: 160d3a9b ("net: ethernet: mtk_eth_soc: introduce MTK_NETSYS_V2 support")
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent aa5ac4be

drivers/net/ethernet/mediatek/mtk_eth_soc.c

+7 −6
Original line number Diff line number Diff line
@@ -3506,16 +3506,17 @@ static int mtk_hw_init(struct mtk_eth *eth) 
		return 0;

	}



	val = RSTCTRL_FE | RSTCTRL_PPE;

	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {

		regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0);

		val = RSTCTRL_PPE0_V2;

	} else {

		val = RSTCTRL_PPE0;

	}



		val |= RSTCTRL_ETH;

	if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1))

		val |= RSTCTRL_PPE1;

	}



	ethsys_reset(eth, val);

	ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | val);



	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {

		regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN,

drivers/net/ethernet/mediatek/mtk_eth_soc.h

+3 −7
Original line number Diff line number Diff line
@@ -474,18 +474,14 @@ 
/* ethernet reset control register */

#define ETHSYS_RSTCTRL			0x34

#define RSTCTRL_FE			BIT(6)

#define RSTCTRL_PPE			BIT(31)

#define RSTCTRL_PPE1			BIT(30)

#define RSTCTRL_PPE0			BIT(31)

#define RSTCTRL_PPE0_V2			BIT(30)

#define RSTCTRL_PPE1			BIT(31)

#define RSTCTRL_ETH			BIT(23)



/* ethernet reset check idle register */

#define ETHSYS_FE_RST_CHK_IDLE_EN	0x28



/* ethernet reset control register */

#define ETHSYS_RSTCTRL		0x34

#define RSTCTRL_FE		BIT(6)

#define RSTCTRL_PPE		BIT(31)



/* ethernet dma channel agent map */

#define ETHSYS_DMA_AG_MAP	0x408

#define ETHSYS_DMA_AG_MAP_PDMA	BIT(0)