Commit ef68a193 authored by Yong Wu's avatar Yong Wu Committed by Joerg Roedel
Browse files

iommu/mediatek: Add mt8195 support 



mt8195 has 3 IOMMU, containing 2 MM IOMMUs, one is for vdo, the other
is for vpp. and 1 INFRA IOMMU.

Signed-off-by: default avatarYong Wu <yong.wu@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20220503071427.2285-24-yong.wu@mediatek.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent e7629070

drivers/iommu/mtk_iommu.c

+41 −0
Original line number Diff line number Diff line
@@ -1233,6 +1233,44 @@ static const struct mtk_iommu_plat_data mt8192_data = { 
			   {0, 14, 16}, {0, 13, 18, 17}},

};



static const struct mtk_iommu_plat_data mt8195_data_infra = {

	.m4u_plat	  = M4U_MT8195,

	.flags            = WR_THROT_EN | DCM_DISABLE | STD_AXI_MODE | PM_CLK_AO |

			    MTK_IOMMU_TYPE_INFRA | IFA_IOMMU_PCIE_SUPPORT,

	.pericfg_comp_str = "mediatek,mt8195-pericfg_ao",

	.inv_sel_reg      = REG_MMU_INV_SEL_GEN2,

	.iova_region      = single_domain,

	.iova_region_nr   = ARRAY_SIZE(single_domain),

};



static const struct mtk_iommu_plat_data mt8195_data_vdo = {

	.m4u_plat	= M4U_MT8195,

	.flags          = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |

			  WR_THROT_EN | IOVA_34_EN | SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,

	.hw_list        = &m4ulist,

	.inv_sel_reg    = REG_MMU_INV_SEL_GEN2,

	.iova_region	= mt8192_multi_dom,

	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),

	.larbid_remap   = {{2, 0}, {21}, {24}, {7}, {19}, {9, 10, 11},

			   {13, 17, 15/* 17b */, 25}, {5}},

};



static const struct mtk_iommu_plat_data mt8195_data_vpp = {

	.m4u_plat	= M4U_MT8195,

	.flags          = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN |

			  WR_THROT_EN | IOVA_34_EN | SHARE_PGTABLE | MTK_IOMMU_TYPE_MM,

	.hw_list        = &m4ulist,

	.inv_sel_reg    = REG_MMU_INV_SEL_GEN2,

	.iova_region	= mt8192_multi_dom,

	.iova_region_nr	= ARRAY_SIZE(mt8192_multi_dom),

	.larbid_remap   = {{1}, {3},

			   {22, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 23},

			   {8}, {20}, {12},

			   /* 16: 16a; 29: 16b; 30: CCUtop0; 31: CCUtop1 */

			   {14, 16, 29, 26, 30, 31, 18},

			   {4, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 6}},

};



static const struct of_device_id mtk_iommu_of_ids[] = {

	{ .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},

	{ .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
@@ -1240,6 +1278,9 @@ static const struct of_device_id mtk_iommu_of_ids[] = { 
	{ .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},

	{ .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},

	{ .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},

	{ .compatible = "mediatek,mt8195-iommu-infra", .data = &mt8195_data_infra},

	{ .compatible = "mediatek,mt8195-iommu-vdo",   .data = &mt8195_data_vdo},

	{ .compatible = "mediatek,mt8195-iommu-vpp",   .data = &mt8195_data_vpp},

	{}

};

drivers/iommu/mtk_iommu.h

+1 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ enum mtk_iommu_plat { 
	M4U_MT8173,

	M4U_MT8183,

	M4U_MT8192,

	M4U_MT8195,

};



struct mtk_iommu_iova_region;