Loading Documentation/devicetree/bindings/spi/omap-spi.txt +3 −1 Original line number Diff line number Diff line Loading @@ -6,7 +6,9 @@ Required properties: - "ti,omap4-spi" for OMAP4+. - ti,spi-num-cs : Number of chipselect supported by the instance. - ti,hwmods: Name of the hwmod associated to the McSPI - ti,pindir-d0-in-d1-out: Select the D0 pin as input and D1 as output. The default is D0 as output and D1 as input. Example: Loading drivers/spi/spi-bcm63xx.c +6 −10 Original line number Diff line number Diff line Loading @@ -36,7 +36,6 @@ #include <bcm63xx_dev_spi.h> #define PFX KBUILD_MODNAME #define DRV_VER "0.1.2" struct bcm63xx_spi { struct completion done; Loading Loading @@ -170,13 +169,6 @@ static int bcm63xx_spi_setup(struct spi_device *spi) return -EINVAL; } ret = bcm63xx_spi_check_transfer(spi, NULL); if (ret < 0) { dev_err(&spi->dev, "setup: unsupported mode bits %x\n", spi->mode & ~MODEBITS); return ret; } dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n", __func__, spi->mode & MODEBITS, spi->bits_per_word, 0); Loading Loading @@ -441,8 +433,8 @@ static int __devinit bcm63xx_spi_probe(struct platform_device *pdev) goto out_clk_disable; } dev_info(dev, "at 0x%08x (irq %d, FIFOs size %d) v%s\n", r->start, irq, bs->fifo_size, DRV_VER); dev_info(dev, "at 0x%08x (irq %d, FIFOs size %d)\n", r->start, irq, bs->fifo_size); return 0; Loading Loading @@ -485,6 +477,8 @@ static int bcm63xx_spi_suspend(struct device *dev) platform_get_drvdata(to_platform_device(dev)); struct bcm63xx_spi *bs = spi_master_get_devdata(master); spi_master_suspend(master); clk_disable(bs->clk); return 0; Loading @@ -498,6 +492,8 @@ static int bcm63xx_spi_resume(struct device *dev) clk_enable(bs->clk); spi_master_resume(master); return 0; } Loading drivers/spi/spi-mxs.c +2 −1 Original line number Diff line number Diff line Loading @@ -323,6 +323,7 @@ static int mxs_spi_txrx_dma(struct mxs_spi *spi, int cs, if (!ret) { dev_err(ssp->dev, "DMA transfer timeout\n"); ret = -ETIMEDOUT; dmaengine_terminate_all(ssp->dmach); goto err_vmalloc; } Loading Loading @@ -480,7 +481,7 @@ static int mxs_spi_transfer_one(struct spi_master *master, first = last = 0; } m->status = 0; m->status = status; spi_finalize_current_message(master); return status; Loading drivers/spi/spi-omap2-mcspi.c +18 −7 Original line number Diff line number Diff line Loading @@ -130,6 +130,7 @@ struct omap2_mcspi { struct omap2_mcspi_dma *dma_channels; struct device *dev; struct omap2_mcspi_regs ctx; unsigned int pin_dir:1; }; struct omap2_mcspi_cs { Loading Loading @@ -765,8 +766,15 @@ static int omap2_mcspi_setup_transfer(struct spi_device *spi, /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS * REVISIT: this controller could support SPI_3WIRE mode. */ l &= ~(OMAP2_MCSPI_CHCONF_IS|OMAP2_MCSPI_CHCONF_DPE1); if (mcspi->pin_dir == MCSPI_PINDIR_D0_OUT_D1_IN) { l &= ~OMAP2_MCSPI_CHCONF_IS; l &= ~OMAP2_MCSPI_CHCONF_DPE1; l |= OMAP2_MCSPI_CHCONF_DPE0; } else { l |= OMAP2_MCSPI_CHCONF_IS; l |= OMAP2_MCSPI_CHCONF_DPE1; l &= ~OMAP2_MCSPI_CHCONF_DPE0; } /* wordlength */ l &= ~OMAP2_MCSPI_CHCONF_WL_MASK; Loading Loading @@ -1167,6 +1175,11 @@ static int __devinit omap2_mcspi_probe(struct platform_device *pdev) master->cleanup = omap2_mcspi_cleanup; master->dev.of_node = node; dev_set_drvdata(&pdev->dev, master); mcspi = spi_master_get_devdata(master); mcspi->master = master; match = of_match_device(omap_mcspi_of_match, &pdev->dev); if (match) { u32 num_cs = 1; /* default number of chipselect */ Loading @@ -1175,19 +1188,17 @@ static int __devinit omap2_mcspi_probe(struct platform_device *pdev) of_property_read_u32(node, "ti,spi-num-cs", &num_cs); master->num_chipselect = num_cs; master->bus_num = bus_num++; if (of_get_property(node, "ti,pindir-d0-in-d1-out", NULL)) mcspi->pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT; } else { pdata = pdev->dev.platform_data; master->num_chipselect = pdata->num_cs; if (pdev->id != -1) master->bus_num = pdev->id; mcspi->pin_dir = pdata->pin_dir; } regs_offset = pdata->regs_offset; dev_set_drvdata(&pdev->dev, master); mcspi = spi_master_get_devdata(master); mcspi->master = master; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (r == NULL) { status = -ENODEV; Loading drivers/spi/spi-s3c64xx.c +16 −16 Original line number Diff line number Diff line Loading @@ -516,7 +516,7 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) /* Disable Clock */ if (sdd->port_conf->clk_from_cmu) { clk_disable(sdd->src_clk); clk_disable_unprepare(sdd->src_clk); } else { val = readl(regs + S3C64XX_SPI_CLK_CFG); val &= ~S3C64XX_SPI_ENCLK_ENABLE; Loading Loading @@ -564,7 +564,7 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) /* There is half-multiplier before the SPI */ clk_set_rate(sdd->src_clk, sdd->cur_speed * 2); /* Enable Clock */ clk_enable(sdd->src_clk); clk_prepare_enable(sdd->src_clk); } else { /* Configure Clock */ val = readl(regs + S3C64XX_SPI_CLK_CFG); Loading Loading @@ -1302,7 +1302,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev) goto err3; } if (clk_enable(sdd->clk)) { if (clk_prepare_enable(sdd->clk)) { dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n"); ret = -EBUSY; goto err4; Loading @@ -1317,7 +1317,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev) goto err5; } if (clk_enable(sdd->src_clk)) { if (clk_prepare_enable(sdd->src_clk)) { dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name); ret = -EBUSY; goto err6; Loading Loading @@ -1361,11 +1361,11 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev) err8: free_irq(irq, sdd); err7: clk_disable(sdd->src_clk); clk_disable_unprepare(sdd->src_clk); err6: clk_put(sdd->src_clk); err5: clk_disable(sdd->clk); clk_disable_unprepare(sdd->clk); err4: clk_put(sdd->clk); err3: Loading Loading @@ -1393,10 +1393,10 @@ static int s3c64xx_spi_remove(struct platform_device *pdev) free_irq(platform_get_irq(pdev, 0), sdd); clk_disable(sdd->src_clk); clk_disable_unprepare(sdd->src_clk); clk_put(sdd->src_clk); clk_disable(sdd->clk); clk_disable_unprepare(sdd->clk); clk_put(sdd->clk); if (!sdd->cntrlr_info->cfg_gpio && pdev->dev.of_node) Loading @@ -1417,8 +1417,8 @@ static int s3c64xx_spi_suspend(struct device *dev) spi_master_suspend(master); /* Disable the clock */ clk_disable(sdd->src_clk); clk_disable(sdd->clk); clk_disable_unprepare(sdd->src_clk); clk_disable_unprepare(sdd->clk); if (!sdd->cntrlr_info->cfg_gpio && dev->of_node) s3c64xx_spi_dt_gpio_free(sdd); Loading @@ -1440,8 +1440,8 @@ static int s3c64xx_spi_resume(struct device *dev) sci->cfg_gpio(); /* Enable the clock */ clk_enable(sdd->src_clk); clk_enable(sdd->clk); clk_prepare_enable(sdd->src_clk); clk_prepare_enable(sdd->clk); s3c64xx_spi_hwinit(sdd, sdd->port_id); Loading @@ -1457,8 +1457,8 @@ static int s3c64xx_spi_runtime_suspend(struct device *dev) struct spi_master *master = dev_get_drvdata(dev); struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); clk_disable(sdd->clk); clk_disable(sdd->src_clk); clk_disable_unprepare(sdd->clk); clk_disable_unprepare(sdd->src_clk); return 0; } Loading @@ -1468,8 +1468,8 @@ static int s3c64xx_spi_runtime_resume(struct device *dev) struct spi_master *master = dev_get_drvdata(dev); struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); clk_enable(sdd->src_clk); clk_enable(sdd->clk); clk_prepare_enable(sdd->src_clk); clk_prepare_enable(sdd->clk); return 0; } Loading Loading
Documentation/devicetree/bindings/spi/omap-spi.txt +3 −1 Original line number Diff line number Diff line Loading @@ -6,7 +6,9 @@ Required properties: - "ti,omap4-spi" for OMAP4+. - ti,spi-num-cs : Number of chipselect supported by the instance. - ti,hwmods: Name of the hwmod associated to the McSPI - ti,pindir-d0-in-d1-out: Select the D0 pin as input and D1 as output. The default is D0 as output and D1 as input. Example: Loading
drivers/spi/spi-bcm63xx.c +6 −10 Original line number Diff line number Diff line Loading @@ -36,7 +36,6 @@ #include <bcm63xx_dev_spi.h> #define PFX KBUILD_MODNAME #define DRV_VER "0.1.2" struct bcm63xx_spi { struct completion done; Loading Loading @@ -170,13 +169,6 @@ static int bcm63xx_spi_setup(struct spi_device *spi) return -EINVAL; } ret = bcm63xx_spi_check_transfer(spi, NULL); if (ret < 0) { dev_err(&spi->dev, "setup: unsupported mode bits %x\n", spi->mode & ~MODEBITS); return ret; } dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n", __func__, spi->mode & MODEBITS, spi->bits_per_word, 0); Loading Loading @@ -441,8 +433,8 @@ static int __devinit bcm63xx_spi_probe(struct platform_device *pdev) goto out_clk_disable; } dev_info(dev, "at 0x%08x (irq %d, FIFOs size %d) v%s\n", r->start, irq, bs->fifo_size, DRV_VER); dev_info(dev, "at 0x%08x (irq %d, FIFOs size %d)\n", r->start, irq, bs->fifo_size); return 0; Loading Loading @@ -485,6 +477,8 @@ static int bcm63xx_spi_suspend(struct device *dev) platform_get_drvdata(to_platform_device(dev)); struct bcm63xx_spi *bs = spi_master_get_devdata(master); spi_master_suspend(master); clk_disable(bs->clk); return 0; Loading @@ -498,6 +492,8 @@ static int bcm63xx_spi_resume(struct device *dev) clk_enable(bs->clk); spi_master_resume(master); return 0; } Loading
drivers/spi/spi-mxs.c +2 −1 Original line number Diff line number Diff line Loading @@ -323,6 +323,7 @@ static int mxs_spi_txrx_dma(struct mxs_spi *spi, int cs, if (!ret) { dev_err(ssp->dev, "DMA transfer timeout\n"); ret = -ETIMEDOUT; dmaengine_terminate_all(ssp->dmach); goto err_vmalloc; } Loading Loading @@ -480,7 +481,7 @@ static int mxs_spi_transfer_one(struct spi_master *master, first = last = 0; } m->status = 0; m->status = status; spi_finalize_current_message(master); return status; Loading
drivers/spi/spi-omap2-mcspi.c +18 −7 Original line number Diff line number Diff line Loading @@ -130,6 +130,7 @@ struct omap2_mcspi { struct omap2_mcspi_dma *dma_channels; struct device *dev; struct omap2_mcspi_regs ctx; unsigned int pin_dir:1; }; struct omap2_mcspi_cs { Loading Loading @@ -765,8 +766,15 @@ static int omap2_mcspi_setup_transfer(struct spi_device *spi, /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS * REVISIT: this controller could support SPI_3WIRE mode. */ l &= ~(OMAP2_MCSPI_CHCONF_IS|OMAP2_MCSPI_CHCONF_DPE1); if (mcspi->pin_dir == MCSPI_PINDIR_D0_OUT_D1_IN) { l &= ~OMAP2_MCSPI_CHCONF_IS; l &= ~OMAP2_MCSPI_CHCONF_DPE1; l |= OMAP2_MCSPI_CHCONF_DPE0; } else { l |= OMAP2_MCSPI_CHCONF_IS; l |= OMAP2_MCSPI_CHCONF_DPE1; l &= ~OMAP2_MCSPI_CHCONF_DPE0; } /* wordlength */ l &= ~OMAP2_MCSPI_CHCONF_WL_MASK; Loading Loading @@ -1167,6 +1175,11 @@ static int __devinit omap2_mcspi_probe(struct platform_device *pdev) master->cleanup = omap2_mcspi_cleanup; master->dev.of_node = node; dev_set_drvdata(&pdev->dev, master); mcspi = spi_master_get_devdata(master); mcspi->master = master; match = of_match_device(omap_mcspi_of_match, &pdev->dev); if (match) { u32 num_cs = 1; /* default number of chipselect */ Loading @@ -1175,19 +1188,17 @@ static int __devinit omap2_mcspi_probe(struct platform_device *pdev) of_property_read_u32(node, "ti,spi-num-cs", &num_cs); master->num_chipselect = num_cs; master->bus_num = bus_num++; if (of_get_property(node, "ti,pindir-d0-in-d1-out", NULL)) mcspi->pin_dir = MCSPI_PINDIR_D0_IN_D1_OUT; } else { pdata = pdev->dev.platform_data; master->num_chipselect = pdata->num_cs; if (pdev->id != -1) master->bus_num = pdev->id; mcspi->pin_dir = pdata->pin_dir; } regs_offset = pdata->regs_offset; dev_set_drvdata(&pdev->dev, master); mcspi = spi_master_get_devdata(master); mcspi->master = master; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (r == NULL) { status = -ENODEV; Loading
drivers/spi/spi-s3c64xx.c +16 −16 Original line number Diff line number Diff line Loading @@ -516,7 +516,7 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) /* Disable Clock */ if (sdd->port_conf->clk_from_cmu) { clk_disable(sdd->src_clk); clk_disable_unprepare(sdd->src_clk); } else { val = readl(regs + S3C64XX_SPI_CLK_CFG); val &= ~S3C64XX_SPI_ENCLK_ENABLE; Loading Loading @@ -564,7 +564,7 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) /* There is half-multiplier before the SPI */ clk_set_rate(sdd->src_clk, sdd->cur_speed * 2); /* Enable Clock */ clk_enable(sdd->src_clk); clk_prepare_enable(sdd->src_clk); } else { /* Configure Clock */ val = readl(regs + S3C64XX_SPI_CLK_CFG); Loading Loading @@ -1302,7 +1302,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev) goto err3; } if (clk_enable(sdd->clk)) { if (clk_prepare_enable(sdd->clk)) { dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n"); ret = -EBUSY; goto err4; Loading @@ -1317,7 +1317,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev) goto err5; } if (clk_enable(sdd->src_clk)) { if (clk_prepare_enable(sdd->src_clk)) { dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name); ret = -EBUSY; goto err6; Loading Loading @@ -1361,11 +1361,11 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev) err8: free_irq(irq, sdd); err7: clk_disable(sdd->src_clk); clk_disable_unprepare(sdd->src_clk); err6: clk_put(sdd->src_clk); err5: clk_disable(sdd->clk); clk_disable_unprepare(sdd->clk); err4: clk_put(sdd->clk); err3: Loading Loading @@ -1393,10 +1393,10 @@ static int s3c64xx_spi_remove(struct platform_device *pdev) free_irq(platform_get_irq(pdev, 0), sdd); clk_disable(sdd->src_clk); clk_disable_unprepare(sdd->src_clk); clk_put(sdd->src_clk); clk_disable(sdd->clk); clk_disable_unprepare(sdd->clk); clk_put(sdd->clk); if (!sdd->cntrlr_info->cfg_gpio && pdev->dev.of_node) Loading @@ -1417,8 +1417,8 @@ static int s3c64xx_spi_suspend(struct device *dev) spi_master_suspend(master); /* Disable the clock */ clk_disable(sdd->src_clk); clk_disable(sdd->clk); clk_disable_unprepare(sdd->src_clk); clk_disable_unprepare(sdd->clk); if (!sdd->cntrlr_info->cfg_gpio && dev->of_node) s3c64xx_spi_dt_gpio_free(sdd); Loading @@ -1440,8 +1440,8 @@ static int s3c64xx_spi_resume(struct device *dev) sci->cfg_gpio(); /* Enable the clock */ clk_enable(sdd->src_clk); clk_enable(sdd->clk); clk_prepare_enable(sdd->src_clk); clk_prepare_enable(sdd->clk); s3c64xx_spi_hwinit(sdd, sdd->port_id); Loading @@ -1457,8 +1457,8 @@ static int s3c64xx_spi_runtime_suspend(struct device *dev) struct spi_master *master = dev_get_drvdata(dev); struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); clk_disable(sdd->clk); clk_disable(sdd->src_clk); clk_disable_unprepare(sdd->clk); clk_disable_unprepare(sdd->src_clk); return 0; } Loading @@ -1468,8 +1468,8 @@ static int s3c64xx_spi_runtime_resume(struct device *dev) struct spi_master *master = dev_get_drvdata(dev); struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); clk_enable(sdd->src_clk); clk_enable(sdd->clk); clk_prepare_enable(sdd->src_clk); clk_prepare_enable(sdd->clk); return 0; } Loading