Commit ef47b7ab authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915: switch KBL to the new stepping scheme 



Add new symbolic names for revision ids, and convert KBL revids to use
them via the new stepping check macros.

This also fixes theoretical out of bounds access to kbl_revids array.

v3: upgrade dbg to warn on unknown revid (José)

v2: Rename stepping->step

Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/79b6c48211c6b214165391d350d556bad748f747.1616764798.git.jani.nikula@intel.com
parent 439c8dcc

drivers/gpu/drm/i915/gt/gen8_engine_cs.c

+1 −1
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ int gen8_emit_flush_rcs(struct i915_request *rq, u32 mode) 
			vf_flush_wa = true;



		/* WaForGAMHang:kbl */

		if (IS_KBL_GT_REVID(rq->engine->i915, 0, KBL_REVID_B0))

		if (IS_KBL_GT_STEP(rq->engine->i915, 0, STEP_B0))

			dc_flush_wa = true;

	}

drivers/gpu/drm/i915/gt/intel_workarounds.c

+3 −3
Original line number Diff line number Diff line
@@ -482,7 +482,7 @@ static void kbl_ctx_workarounds_init(struct intel_engine_cs *engine, 
	gen9_ctx_workarounds_init(engine, wal);



	/* WaToEnableHwFixForPushConstHWBug:kbl */

	if (IS_KBL_GT_REVID(i915, KBL_REVID_C0, REVID_FOREVER))

	if (IS_KBL_GT_STEP(i915, STEP_C0, STEP_FOREVER))

		wa_masked_en(wal, COMMON_SLICE_CHICKEN2,

			     GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
@@ -900,7 +900,7 @@ kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) 
	gen9_gt_workarounds_init(i915, wal);



	/* WaDisableDynamicCreditSharing:kbl */

	if (IS_KBL_GT_REVID(i915, 0, KBL_REVID_B0))

	if (IS_KBL_GT_STEP(i915, 0, STEP_B0))

		wa_write_or(wal,

			    GAMT_CHKN_BIT_REG,

			    GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
@@ -2022,7 +2022,7 @@ xcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) 
	struct drm_i915_private *i915 = engine->i915;



	/* WaKBLVECSSemaphoreWaitPoll:kbl */

	if (IS_KBL_GT_REVID(i915, KBL_REVID_A0, KBL_REVID_E0)) {

	if (IS_KBL_GT_STEP(i915, STEP_A0, STEP_E0)) {

		wa_write(wal,

			 RING_SEMA_WAIT_POLL(engine->mmio_base),

			 1);

drivers/gpu/drm/i915/i915_drv.c

+2 −1
Original line number Diff line number Diff line
@@ -272,7 +272,7 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv) 
	pre |= IS_HSW_EARLY_SDV(dev_priv);

	pre |= IS_SKL_REVID(dev_priv, 0, SKL_REVID_F0);

	pre |= IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST);

	pre |= IS_KBL_GT_REVID(dev_priv, 0, KBL_REVID_A0);

	pre |= IS_KBL_GT_STEP(dev_priv, 0, STEP_A0);

	pre |= IS_GLK_REVID(dev_priv, 0, GLK_REVID_A2);



	if (pre) {
@@ -306,6 +306,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv) 
		return -ENODEV;



	intel_device_info_subplatform_init(dev_priv);

	intel_step_init(dev_priv);



	intel_uncore_mmio_debug_init_early(&dev_priv->mmio_debug);

	intel_uncore_init_early(&dev_priv->uncore, dev_priv);

drivers/gpu/drm/i915/i915_drv.h

+4 −20
Original line number Diff line number Diff line
@@ -1467,26 +1467,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, 
#define IS_BXT_REVID(dev_priv, since, until) \

	(IS_BROXTON(dev_priv) && IS_REVID(dev_priv, since, until))



enum {

	KBL_REVID_A0,

	KBL_REVID_B0,

	KBL_REVID_B1,

	KBL_REVID_C0,

	KBL_REVID_D0,

	KBL_REVID_D1,

	KBL_REVID_E0,

	KBL_REVID_F0,

	KBL_REVID_G0,

};



#define IS_KBL_GT_REVID(dev_priv, since, until) \

	(IS_KABYLAKE(dev_priv) && \

	 kbl_revids[INTEL_REVID(dev_priv)].gt_stepping >= since && \

	 kbl_revids[INTEL_REVID(dev_priv)].gt_stepping <= until)

#define IS_KBL_DISP_REVID(dev_priv, since, until) \

	(IS_KABYLAKE(dev_priv) && \

	 kbl_revids[INTEL_REVID(dev_priv)].disp_stepping >= since && \

	 kbl_revids[INTEL_REVID(dev_priv)].disp_stepping <= until)

#define IS_KBL_GT_STEP(dev_priv, since, until) \

	(IS_KABYLAKE(dev_priv) && IS_GT_STEP(dev_priv, since, until))

#define IS_KBL_DISPLAY_STEP(dev_priv, since, until) \

	(IS_KABYLAKE(dev_priv) && IS_DISPLAY_STEP(dev_priv, since, until))



#define GLK_REVID_A0		0x0

#define GLK_REVID_A1		0x1

drivers/gpu/drm/i915/intel_pm.c

+2 −2
Original line number Diff line number Diff line
@@ -7233,12 +7233,12 @@ static void kbl_init_clock_gating(struct drm_i915_private *dev_priv) 
		   FBC_LLC_FULLY_OPEN);



	/* WaDisableSDEUnitClockGating:kbl */

	if (IS_KBL_GT_REVID(dev_priv, 0, KBL_REVID_B0))

	if (IS_KBL_GT_STEP(dev_priv, 0, STEP_B0))

		intel_uncore_write(&dev_priv->uncore, GEN8_UCGCTL6, intel_uncore_read(&dev_priv->uncore, GEN8_UCGCTL6) |

			   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);



	/* WaDisableGamClockGating:kbl */

	if (IS_KBL_GT_REVID(dev_priv, 0, KBL_REVID_B0))

	if (IS_KBL_GT_STEP(dev_priv, 0, STEP_B0))

		intel_uncore_write(&dev_priv->uncore, GEN6_UCGCTL1, intel_uncore_read(&dev_priv->uncore, GEN6_UCGCTL1) |

			   GEN6_GAMUNIT_CLOCK_GATE_DISABLE);