Commit ef016229 authored by Potnuri Bharat Teja's avatar Potnuri Bharat Teja Committed by Leon Romanovsky
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RDMA/cxgb4: fix accept failure due to increased cpl_t5_pass_accept_rpl size 

Commit 'c2ed5611' has increased the cpl_t5_pass_accept_rpl{} structure
size by 8B to avoid roundup. cpl_t5_pass_accept_rpl{} is a HW specific
structure and increasing its size will lead to unwanted adapter errors.
Current commit reverts the cpl_t5_pass_accept_rpl{} back to its original
and allocates zeroed skb buffer there by avoiding the memset for iss field.
Reorder code to minimize chip type checks.

Fixes: c2ed5611 ("iw_cxgb4: Use memset_startat() for cpl_t5_pass_accept_rpl")
Link: https://lore.kernel.org/r/20220809184118.2029-1-rahul.lakkireddy@chelsio.com


Signed-off-by: default avatarPotnuri Bharat Teja <bharat@chelsio.com>
Signed-off-by: default avatarRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Reviewed-by: default avatarKees Cook <keescook@chromium.org>
Signed-off-by: default avatarLeon Romanovsky <leon@kernel.org>
parent 4b83c3ca

drivers/infiniband/hw/cxgb4/cm.c

+9 −16
Original line number Diff line number Diff line
@@ -2468,31 +2468,24 @@ static int accept_cr(struct c4iw_ep *ep, struct sk_buff *skb, 
			opt2 |= CCTRL_ECN_V(1);

	}



	skb_get(skb);

	rpl = cplhdr(skb);

	if (!is_t4(adapter_type)) {

		BUILD_BUG_ON(sizeof(*rpl5) != roundup(sizeof(*rpl5), 16));

		skb_trim(skb, sizeof(*rpl5));

		rpl5 = (void *)rpl;

		INIT_TP_WR(rpl5, ep->hwtid);

	} else {

		skb_trim(skb, sizeof(*rpl));

		INIT_TP_WR(rpl, ep->hwtid);

	}

	OPCODE_TID(rpl) = cpu_to_be32(MK_OPCODE_TID(CPL_PASS_ACCEPT_RPL,

						    ep->hwtid));



	if (CHELSIO_CHIP_VERSION(adapter_type) > CHELSIO_T4) {

		u32 isn = (prandom_u32() & ~7UL) - 1;



		skb = get_skb(skb, roundup(sizeof(*rpl5), 16), GFP_KERNEL);

		rpl5 = __skb_put_zero(skb, roundup(sizeof(*rpl5), 16));

		rpl = (void *)rpl5;

		INIT_TP_WR_CPL(rpl5, CPL_PASS_ACCEPT_RPL, ep->hwtid);

		opt2 |= T5_OPT_2_VALID_F;

		opt2 |= CONG_CNTRL_V(CONG_ALG_TAHOE);

		opt2 |= T5_ISS_F;

		rpl5 = (void *)rpl;

		memset_after(rpl5, 0, iss);

		if (peer2peer)

			isn += 4;

		rpl5->iss = cpu_to_be32(isn);

		pr_debug("iss %u\n", be32_to_cpu(rpl5->iss));

	} else {

		skb = get_skb(skb, sizeof(*rpl), GFP_KERNEL);

		rpl = __skb_put_zero(skb, sizeof(*rpl));

		INIT_TP_WR_CPL(rpl, CPL_PASS_ACCEPT_RPL, ep->hwtid);

	}



	rpl->opt0 = cpu_to_be64(opt0);

drivers/net/ethernet/chelsio/cxgb4/t4_msg.h

+1 −1
Original line number Diff line number Diff line
@@ -497,7 +497,7 @@ struct cpl_t5_pass_accept_rpl { 
	__be32 opt2;

	__be64 opt0;

	__be32 iss;

	__be32 rsvd[3];

	__be32 rsvd;

};



struct cpl_act_open_req {