Unverified Commit eefb5f3a authored by Sebastien Van Cauwenberghe's avatar Sebastien Van Cauwenberghe Committed by Palmer Dabbelt
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riscv: Align on L1_CACHE_BYTES when STRICT_KERNEL_RWX 



Allows the sections to be aligned on smaller boundaries and
therefore results in a smaller kernel image size.

Signed-off-by: default avatarSebastien Van Cauwenberghe <svancau@gmail.com>
Reviewed-by: default avatarAtish Patra <atish.patra@wdc.com>
Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
parent f105ea98

arch/riscv/include/asm/set_memory.h

+3 −3
Original line number Diff line number Diff line
@@ -32,14 +32,14 @@ bool kernel_page_present(struct page *page); 


#endif /* __ASSEMBLY__ */



#ifdef CONFIG_ARCH_HAS_STRICT_KERNEL_RWX

#ifdef CONFIG_STRICT_KERNEL_RWX

#ifdef CONFIG_64BIT

#define SECTION_ALIGN (1 << 21)

#else

#define SECTION_ALIGN (1 << 22)

#endif

#else /* !CONFIG_ARCH_HAS_STRICT_KERNEL_RWX */

#else /* !CONFIG_STRICT_KERNEL_RWX */

#define SECTION_ALIGN L1_CACHE_BYTES

#endif /* CONFIG_ARCH_HAS_STRICT_KERNEL_RWX */

#endif /* CONFIG_STRICT_KERNEL_RWX */



#endif /* _ASM_RISCV_SET_MEMORY_H */