Unverified Commit eec262d1 authored by Mark Brown's avatar Mark Brown
Browse files

Merge remote-tracking branch 'spi/for-5.12' into spi-next

parents 110bc220 d2275139

Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml

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@@ -25,6 +25,7 @@ properties: 
          - enum:

              - allwinner,sun8i-r40-spi

              - allwinner,sun50i-h6-spi

              - allwinner,sun50i-h616-spi

          - const: allwinner,sun8i-h3-spi



  reg:

Documentation/devicetree/bindings/mtd/cadence-quadspi.txt→Documentation/devicetree/bindings/spi/cadence-quadspi.txt

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@@ -5,6 +5,7 @@ Required properties: 
	Generic default - "cdns,qspi-nor".

	For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".

	For TI AM654 SoC  - "ti,am654-ospi", "cdns,qspi-nor".

	For Intel LGM SoC - "intel,lgm-qspi", "cdns,qspi-nor".

- reg : Contains two entries, each of which is a tuple consisting of a

	physical address and length. The first entry is the address and

	length of the controller register set. The second entry is the

Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Tegra Quad SPI Controller



maintainers:

  - Thierry Reding <thierry.reding@gmail.com>

  - Jonathan Hunter <jonathanh@nvidia.com>



allOf:

  - $ref: "spi-controller.yaml#"



properties:

  compatible:

    enum:

      - nvidia,tegra210-qspi

      - nvidia,tegra186-qspi

      - nvidia,tegra194-qspi



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clock-names:

    items:

      - const: qspi

      - const: qspi_out



  clocks:

    maxItems: 2



  resets:

    maxItems: 1



  dmas:

    maxItems: 2



  dma-names:

    items:

      - const: rx

      - const: tx



patternProperties:

  "@[0-9a-f]+":

    type: object



    properties:

      spi-rx-bus-width:

        enum: [1, 2, 4]



      spi-tx-bus-width:

        enum: [1, 2, 4]



      nvidia,tx-clk-tap-delay:

        description:

          Delays the clock going out to device with this tap value.

          Tap value varies based on platform design trace lengths from Tegra

          QSPI to corresponding slave device.

        $ref: /schemas/types.yaml#/definitions/uint32

        minimum: 0

        maximum: 31



      nvidia,rx-clk-tap-delay:

        description:

          Delays the clock coming in from the device with this tap value.

          Tap value varies based on platform design trace lengths from Tegra

          QSPI to corresponding slave device.

        $ref: /schemas/types.yaml#/definitions/uint32

        minimum: 0

        maximum: 255



    required:

      - reg



required:

  - compatible

  - reg

  - interrupts

  - clock-names

  - clocks

  - resets



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/tegra210-car.h>

    #include <dt-bindings/reset/tegra210-car.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    spi@70410000 {

            compatible = "nvidia,tegra210-qspi";

            reg = <0x70410000 0x1000>;

            interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

            #address-cells = <1>;

            #size-cells = <0>;

            clocks = <&tegra_car TEGRA210_CLK_QSPI>,

                     <&tegra_car TEGRA210_CLK_QSPI_PM>;

            clock-names = "qspi", "qspi_out";

            resets = <&tegra_car 211>;

            dmas = <&apbdma 5>, <&apbdma 5>;

            dma-names = "rx", "tx";



            flash@0 {

                    compatible = "spi-nor";

                    reg = <0>;

                    spi-max-frequency = <104000000>;

                    spi-tx-bus-width = <2>;

                    spi-rx-bus-width = <2>;

                    nvidia,tx-clk-tap-delay = <0>;

                    nvidia,rx-clk-tap-delay = <0>;

            };

    };

Documentation/devicetree/bindings/spi/realtek,rtl-spi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/spi/realtek,rtl-spi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Realtek RTL838x/RTL839x SPI controller



maintainers:

  - Bert Vermeulen <bert@biot.com>

  - Birger Koblitz <mail@birger-koblitz.de>



allOf:

  - $ref: "spi-controller.yaml#"



properties:

  compatible:

    oneOf:

      - const: realtek,rtl8380-spi

      - const: realtek,rtl8382-spi

      - const: realtek,rtl8391-spi

      - const: realtek,rtl8392-spi

      - const: realtek,rtl8393-spi



  reg:

    maxItems: 1



required:

  - compatible

  - reg



unevaluatedProperties: false



examples:

  - |

    spi: spi@1200 {

        compatible = "realtek,rtl8382-spi";

        reg = <0x1200 0x100>;

        #address-cells = <1>;

        #size-cells = <0>;

    };

Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml

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@@ -47,6 +47,7 @@ properties: 
              - renesas,msiof-r8a77980      # R-Car V3H

              - renesas,msiof-r8a77990      # R-Car E3

              - renesas,msiof-r8a77995      # R-Car D3

              - renesas,msiof-r8a779a0      # R-Car V3U

          - const: renesas,rcar-gen3-msiof  # generic R-Car Gen3 and RZ/G2

                                            # compatible device

      - items: