Loading drivers/gpu/drm/nouveau/Makefile +2 −2 Original line number Diff line number Diff line Loading @@ -249,7 +249,7 @@ nouveau-y += core/engine/graph/ctxnv40.o nouveau-y += core/engine/graph/ctxnv50.o nouveau-y += core/engine/graph/ctxnvc0.o nouveau-y += core/engine/graph/ctxnvc1.o nouveau-y += core/engine/graph/ctxnvc3.o nouveau-y += core/engine/graph/ctxnvc4.o nouveau-y += core/engine/graph/ctxnvc8.o nouveau-y += core/engine/graph/ctxnvd7.o nouveau-y += core/engine/graph/ctxnvd9.o Loading @@ -268,7 +268,7 @@ nouveau-y += core/engine/graph/nv40.o nouveau-y += core/engine/graph/nv50.o nouveau-y += core/engine/graph/nvc0.o nouveau-y += core/engine/graph/nvc1.o nouveau-y += core/engine/graph/nvc3.o nouveau-y += core/engine/graph/nvc4.o nouveau-y += core/engine/graph/nvc8.o nouveau-y += core/engine/graph/nvd7.o nouveau-y += core/engine/graph/nvd9.o Loading drivers/gpu/drm/nouveau/core/engine/device/nvc0.c +4 −4 Original line number Diff line number Diff line Loading @@ -112,7 +112,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc4_graph_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; Loading Loading @@ -144,7 +144,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc4_graph_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; Loading Loading @@ -175,7 +175,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc4_graph_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; Loading Loading @@ -207,7 +207,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc4_graph_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; Loading drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c→drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc4.c +5 −5 Original line number Diff line number Diff line Loading @@ -25,7 +25,7 @@ #include "nvc0.h" static struct nvc0_graph_init nvc3_grctx_init_tpc[] = { nvc4_grctx_init_tpc[] = { { 0x419818, 1, 0x04, 0x00000000 }, { 0x41983c, 1, 0x04, 0x00038bc7 }, { 0x419848, 1, 0x04, 0x00000000 }, Loading Loading @@ -71,15 +71,15 @@ nvc3_grctx_init_tpc[] = { }; struct nvc0_graph_init * nvc3_grctx_init_gpc[] = { nvc4_grctx_init_gpc[] = { nvc0_grctx_init_gpc_0, nvc0_grctx_init_gpc_1, nvc3_grctx_init_tpc, nvc4_grctx_init_tpc, NULL }; struct nouveau_oclass * nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) { nvc4_grctx_oclass = &(struct nvc0_grctx_oclass) { .base.handle = NV_ENGCTX(GR, 0xc3), .base.ofuncs = &(struct nouveau_ofuncs) { .ctor = nvc0_graph_context_ctor, Loading @@ -93,7 +93,7 @@ nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) { .mods = nvc0_grctx_generate_mods, .unkn = nvc0_grctx_generate_unkn, .hub = nvc0_grctx_init_hub, .gpc = nvc3_grctx_init_gpc, .gpc = nvc4_grctx_init_gpc, .icmd = nvc0_grctx_init_icmd, .mthd = nvc0_grctx_init_mthd, }.base; drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h +2 −2 Original line number Diff line number Diff line Loading @@ -196,7 +196,7 @@ extern struct nvc0_graph_init nvc0_graph_init_gpc[]; extern struct nvc0_graph_init nvc0_graph_init_unk88xx[]; extern struct nvc0_graph_init nvc0_graph_tpc_0[]; extern struct nvc0_graph_init nvc3_graph_init_unk58xx[]; extern struct nvc0_graph_init nvc4_graph_init_unk58xx[]; extern struct nvc0_graph_init nvd9_graph_init_unk58xx[]; extern struct nvc0_graph_init nvd9_graph_init_unk64xx[]; Loading Loading @@ -249,7 +249,7 @@ void nvc1_grctx_generate_unkn(struct nvc0_graph_priv *); extern struct nouveau_oclass *nvc1_grctx_oclass; extern struct nvc0_graph_init nvc1_grctx_init_9097[]; extern struct nouveau_oclass *nvc3_grctx_oclass; extern struct nouveau_oclass *nvc4_grctx_oclass; extern struct nouveau_oclass *nvc8_grctx_oclass; extern struct nvc0_graph_init nvc8_grctx_init_9197[]; Loading drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c +1 −1 Original line number Diff line number Diff line Loading @@ -118,7 +118,7 @@ nvc1_graph_init_mmio[] = { nvc0_graph_init_unk44xx, nvc0_graph_init_unk78xx, nvc0_graph_init_unk60xx, nvc3_graph_init_unk58xx, nvc4_graph_init_unk58xx, nvc0_graph_init_unk80xx, nvc1_graph_init_gpc, nvc1_graph_init_tpc, Loading Loading
drivers/gpu/drm/nouveau/Makefile +2 −2 Original line number Diff line number Diff line Loading @@ -249,7 +249,7 @@ nouveau-y += core/engine/graph/ctxnv40.o nouveau-y += core/engine/graph/ctxnv50.o nouveau-y += core/engine/graph/ctxnvc0.o nouveau-y += core/engine/graph/ctxnvc1.o nouveau-y += core/engine/graph/ctxnvc3.o nouveau-y += core/engine/graph/ctxnvc4.o nouveau-y += core/engine/graph/ctxnvc8.o nouveau-y += core/engine/graph/ctxnvd7.o nouveau-y += core/engine/graph/ctxnvd9.o Loading @@ -268,7 +268,7 @@ nouveau-y += core/engine/graph/nv40.o nouveau-y += core/engine/graph/nv50.o nouveau-y += core/engine/graph/nvc0.o nouveau-y += core/engine/graph/nvc1.o nouveau-y += core/engine/graph/nvc3.o nouveau-y += core/engine/graph/nvc4.o nouveau-y += core/engine/graph/nvc8.o nouveau-y += core/engine/graph/nvd7.o nouveau-y += core/engine/graph/nvd9.o Loading
drivers/gpu/drm/nouveau/core/engine/device/nvc0.c +4 −4 Original line number Diff line number Diff line Loading @@ -112,7 +112,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc4_graph_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; Loading Loading @@ -144,7 +144,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc4_graph_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; Loading Loading @@ -175,7 +175,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc4_graph_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; Loading Loading @@ -207,7 +207,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = nvc0_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc3_graph_oclass; device->oclass[NVDEV_ENGINE_GR ] = nvc4_graph_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nvc0_vp_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &nvc0_bsp_oclass; device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; Loading
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c→drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc4.c +5 −5 Original line number Diff line number Diff line Loading @@ -25,7 +25,7 @@ #include "nvc0.h" static struct nvc0_graph_init nvc3_grctx_init_tpc[] = { nvc4_grctx_init_tpc[] = { { 0x419818, 1, 0x04, 0x00000000 }, { 0x41983c, 1, 0x04, 0x00038bc7 }, { 0x419848, 1, 0x04, 0x00000000 }, Loading Loading @@ -71,15 +71,15 @@ nvc3_grctx_init_tpc[] = { }; struct nvc0_graph_init * nvc3_grctx_init_gpc[] = { nvc4_grctx_init_gpc[] = { nvc0_grctx_init_gpc_0, nvc0_grctx_init_gpc_1, nvc3_grctx_init_tpc, nvc4_grctx_init_tpc, NULL }; struct nouveau_oclass * nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) { nvc4_grctx_oclass = &(struct nvc0_grctx_oclass) { .base.handle = NV_ENGCTX(GR, 0xc3), .base.ofuncs = &(struct nouveau_ofuncs) { .ctor = nvc0_graph_context_ctor, Loading @@ -93,7 +93,7 @@ nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) { .mods = nvc0_grctx_generate_mods, .unkn = nvc0_grctx_generate_unkn, .hub = nvc0_grctx_init_hub, .gpc = nvc3_grctx_init_gpc, .gpc = nvc4_grctx_init_gpc, .icmd = nvc0_grctx_init_icmd, .mthd = nvc0_grctx_init_mthd, }.base;
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h +2 −2 Original line number Diff line number Diff line Loading @@ -196,7 +196,7 @@ extern struct nvc0_graph_init nvc0_graph_init_gpc[]; extern struct nvc0_graph_init nvc0_graph_init_unk88xx[]; extern struct nvc0_graph_init nvc0_graph_tpc_0[]; extern struct nvc0_graph_init nvc3_graph_init_unk58xx[]; extern struct nvc0_graph_init nvc4_graph_init_unk58xx[]; extern struct nvc0_graph_init nvd9_graph_init_unk58xx[]; extern struct nvc0_graph_init nvd9_graph_init_unk64xx[]; Loading Loading @@ -249,7 +249,7 @@ void nvc1_grctx_generate_unkn(struct nvc0_graph_priv *); extern struct nouveau_oclass *nvc1_grctx_oclass; extern struct nvc0_graph_init nvc1_grctx_init_9097[]; extern struct nouveau_oclass *nvc3_grctx_oclass; extern struct nouveau_oclass *nvc4_grctx_oclass; extern struct nouveau_oclass *nvc8_grctx_oclass; extern struct nvc0_graph_init nvc8_grctx_init_9197[]; Loading
drivers/gpu/drm/nouveau/core/engine/graph/nvc1.c +1 −1 Original line number Diff line number Diff line Loading @@ -118,7 +118,7 @@ nvc1_graph_init_mmio[] = { nvc0_graph_init_unk44xx, nvc0_graph_init_unk78xx, nvc0_graph_init_unk60xx, nvc3_graph_init_unk58xx, nvc4_graph_init_unk58xx, nvc0_graph_init_unk80xx, nvc1_graph_init_gpc, nvc1_graph_init_tpc, Loading