Commit edeb2ca7 authored by Martin Botka's avatar Martin Botka Committed by Stephen Boyd
Browse files

clk: qcom: smd: Add support for SM6125 rpm clocks 



Add rpm smd clocks, PMIC and bus clocks which are required on SM6125
for clients to vote on.

Signed-off-by: default avatarMartin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210730215924.733350-2-martin.botka@somainline.org


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 4b1ec711

drivers/clk/qcom/clk-smd-rpm.c

+56 −0
Original line number Diff line number Diff line
@@ -913,6 +913,61 @@ static const struct rpm_smd_clk_desc rpm_clk_sdm660 = { 
	.num_clks = ARRAY_SIZE(sdm660_clks),

};



/* SM6125 */

DEFINE_CLK_SMD_RPM(sm6125, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);

DEFINE_CLK_SMD_RPM(sm6125, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);

DEFINE_CLK_SMD_RPM_BRANCH(sm6125, qdss_clk, qdss_a_clk,

					QCOM_SMD_RPM_MISC_CLK, 1, 19200000);

DEFINE_CLK_SMD_RPM(sm6125, qup_clk, qup_a_clk, QCOM_SMD_RPM_QUP_CLK, 0);

DEFINE_CLK_SMD_RPM(sm6125, mmnrt_clk, mmnrt_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 0);

DEFINE_CLK_SMD_RPM(sm6125, mmrt_clk, mmrt_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 1);

DEFINE_CLK_SMD_RPM(sm6125, snoc_periph_clk, snoc_periph_a_clk,

						QCOM_SMD_RPM_BUS_CLK, 0);

DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass_clk, snoc_lpass_a_clk,

						QCOM_SMD_RPM_BUS_CLK, 5);



static struct clk_smd_rpm *sm6125_clks[] = {

	[RPM_SMD_XO_CLK_SRC] = &sdm660_bi_tcxo,

	[RPM_SMD_XO_A_CLK_SRC] = &sdm660_bi_tcxo_a,

	[RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,

	[RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,

	[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,

	[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,

	[RPM_SMD_QDSS_CLK] = &sm6125_qdss_clk,

	[RPM_SMD_QDSS_A_CLK] = &sm6125_qdss_a_clk,

	[RPM_SMD_RF_CLK1] = &msm8916_rf_clk1,

	[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,

	[RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,

	[RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,

	[RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,

	[RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,

	[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,

	[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,

	[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,

	[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,

	[RPM_SMD_LN_BB_CLK1] = &msm8916_bb_clk1,

	[RPM_SMD_LN_BB_CLK1_A] = &msm8916_bb_clk1_a,

	[RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2,

	[RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a,

	[RPM_SMD_LN_BB_CLK3] = &sdm660_ln_bb_clk3,

	[RPM_SMD_LN_BB_CLK3_A] = &sdm660_ln_bb_clk3_a,

	[RPM_SMD_QUP_CLK] = &sm6125_qup_clk,

	[RPM_SMD_QUP_A_CLK] = &sm6125_qup_a_clk,

	[RPM_SMD_MMRT_CLK] = &sm6125_mmrt_clk,

	[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,

	[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,

	[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,

	[RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,

	[RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,

	[RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,

	[RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,

};



static const struct rpm_smd_clk_desc rpm_clk_sm6125 = {

	.clks = sm6125_clks,

	.num_clks = ARRAY_SIZE(sm6125_clks),

};



static const struct of_device_id rpm_smd_clk_match_table[] = {

	{ .compatible = "qcom,rpmcc-msm8226", .data = &rpm_clk_msm8974 },

	{ .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 },
@@ -925,6 +980,7 @@ static const struct of_device_id rpm_smd_clk_match_table[] = { 
	{ .compatible = "qcom,rpmcc-msm8998", .data = &rpm_clk_msm8998 },

	{ .compatible = "qcom,rpmcc-qcs404",  .data = &rpm_clk_qcs404  },

	{ .compatible = "qcom,rpmcc-sdm660",  .data = &rpm_clk_sdm660  },

	{ .compatible = "qcom,rpmcc-sm6125",  .data = &rpm_clk_sm6125  },

	{ }

};

MODULE_DEVICE_TABLE(of, rpm_smd_clk_match_table);

include/linux/soc/qcom/smd-rpm.h

+1 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ struct qcom_smd_rpm; 
#define QCOM_SMD_RPM_NCPB	0x6270636E

#define QCOM_SMD_RPM_OCMEM_PWR	0x706d636f

#define QCOM_SMD_RPM_QPIC_CLK	0x63697071

#define QCOM_SMD_RPM_QUP_CLK	0x707571

#define QCOM_SMD_RPM_SMPA	0x61706d73

#define QCOM_SMD_RPM_SMPB	0x62706d73

#define QCOM_SMD_RPM_SPDM	0x63707362