Commit eddbb074 authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915/dp: Add workaround for spurious AUX timeouts/hotplugs on LTTPR links 



To avoid AUX timeouts and subsequent spurious hotplug interrupts, make
sure that the first DPCD access during detection is a read from an LTTPR
register.

Some ADLP DP link configuration at least with multiple LTTPRs expects
the first DPCD access during the LTTPR/DPCD detection after hotplug to
be a read from the LTTPR range starting with
DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV. The side effect of
this read is to put each LTTPR into the LTTPR transparent or LTTPR
non-transparent mode.

The lack of the above read may leave some of the LTTPRs in non-LTTPR
mode, while other LTTPRs in LTTPR transparent or LTTPR non-transparent
mode (for instance LTTPRs after system suspend/resume that kept their
mode from before suspend). Due to the different AUX timeouts the
different modes imply, the DPCD access from a non-LTTPR range will
timeout and lead to an LTTPR generated hotplug towards the source (which
the LTTPR firmware uses to account for buggy TypeC adapters with a long
wake-up delay).

SYSCROS: 72939

v2: Keep DPCD read-out working on non-LTTPR platforms.
v3: Summarize what and why the patch does at the beginning of the commit
    log. (Jani)

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220408224629.845887-1-imre.deak@intel.com
parent 3e8d34ed

drivers/gpu/drm/i915/display/intel_dp_link_training.c

+17 −16
Original line number Diff line number Diff line
@@ -82,19 +82,8 @@ static bool intel_dp_read_lttpr_common_caps(struct intel_dp *intel_dp, 
					    const u8 dpcd[DP_RECEIVER_CAP_SIZE])

{

	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;

	struct drm_i915_private *i915 = to_i915(encoder->base.dev);

	int ret;



	if (intel_dp_is_edp(intel_dp))

		return false;



	/*

	 * Detecting LTTPRs must be avoided on platforms with an AUX timeout

	 * period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1).

	 */

	if (DISPLAY_VER(i915) < 10 || IS_GEMINILAKE(i915))

		return false;



	ret = drm_dp_read_lttpr_common_caps(&intel_dp->aux, dpcd,

					    intel_dp->lttpr_common_caps);

	if (ret < 0)
@@ -197,13 +186,25 @@ static int intel_dp_init_lttpr(struct intel_dp *intel_dp, const u8 dpcd[DP_RECEI 
 */

int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp)

{

	struct drm_i915_private *i915 = dp_to_i915(intel_dp);

	int lttpr_count = 0;



	/*

	 * Detecting LTTPRs must be avoided on platforms with an AUX timeout

	 * period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1).

	 */

	if (!intel_dp_is_edp(intel_dp) &&

	    (DISPLAY_VER(i915) >= 10 && !IS_GEMINILAKE(i915))) {

		u8 dpcd[DP_RECEIVER_CAP_SIZE];

	int lttpr_count;



		if (drm_dp_dpcd_probe(&intel_dp->aux, DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV))

			return -EIO;



		if (drm_dp_read_dpcd_caps(&intel_dp->aux, dpcd))

			return -EIO;



		lttpr_count = intel_dp_init_lttpr(intel_dp, dpcd);

	}



	/*

	 * The DPTX shall read the DPRX caps after LTTPR detection, so re-read