Commit edd8b295 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'mlx5-ipsec-packet-offload-support-in-eswitch-mode'

Leon Romanovsky says:

====================
mlx5 IPsec packet offload support in eswitch mode

This series from Jianbo adds mlx5 IPsec packet offload support in eswitch
offloaded mode.

It works exactly like "regular" IPsec, nothing special, except
now users can switch to switchdev before adding IPsec rules.

 devlink dev eswitch set pci/0000:06:00.0 mode switchdev

Same configurations as here:

https://lore.kernel.org/netdev/cover.1670005543.git.leonro@nvidia.com/

Packet offload mode:
  ip xfrm state offload packet dev <if-name> dir <in|out>
  ip xfrm policy .... offload packet dev <if-name>
Crypto offload mode:
  ip xfrm state offload crypto dev <if-name> dir <in|out>
or (backward compatibility)
  ip xfrm state offload dev <if-name> dir <in|out>

v0: https://lore.kernel.org/all/cover.1689064922.git.leonro@nvidia.com
====================

Link: https://lore.kernel.org/r/cover.1690802064.git.leon@kernel.org


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 30ff01ee c8e350e6
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+4 −0
Original line number Diff line number Diff line
@@ -75,6 +75,10 @@ mlx5_core-$(CONFIG_MLX5_ESWITCH) += esw/acl/helper.o \
				      esw/acl/egress_lgcy.o esw/acl/egress_ofld.o \
				      esw/acl/ingress_lgcy.o esw/acl/ingress_ofld.o

ifneq ($(CONFIG_MLX5_EN_IPSEC),)
	mlx5_core-$(CONFIG_MLX5_ESWITCH)   += esw/ipsec_fs.o
endif

mlx5_core-$(CONFIG_MLX5_BRIDGE)    += esw/bridge.o esw/bridge_mcast.o esw/bridge_debugfs.o \
				      en/rep/bridge.o

+14 −3
Original line number Diff line number Diff line
@@ -715,9 +715,20 @@ void mlx5e_rep_tc_receive(struct mlx5_cqe64 *cqe, struct mlx5e_rq *rq,
	uplink_priv = &uplink_rpriv->uplink_priv;
	ct_priv = uplink_priv->ct_priv;

	if (!mlx5_ipsec_is_rx_flow(cqe) &&
	    !mlx5e_tc_update_skb(cqe, skb, mapping_ctx, reg_c0, ct_priv, zone_restore_id, tunnel_id,
				 &tc_priv))
#ifdef CONFIG_MLX5_EN_IPSEC
	if (!(tunnel_id >> ESW_TUN_OPTS_BITS)) {
		u32 mapped_id;
		u32 metadata;

		mapped_id = tunnel_id & ESW_IPSEC_RX_MAPPED_ID_MASK;
		if (mapped_id &&
		    !mlx5_esw_ipsec_rx_make_metadata(priv, mapped_id, &metadata))
			mlx5e_ipsec_offload_handle_rx_skb(priv->netdev, skb, metadata);
	}
#endif

	if (!mlx5e_tc_update_skb(cqe, skb, mapping_ctx, reg_c0, ct_priv,
				 zone_restore_id, tunnel_id, &tc_priv))
		goto free_skb;

forward:
+2 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@
#include "en.h"
#include "ipsec.h"
#include "ipsec_rxtx.h"
#include "en_rep.h"

#define MLX5_IPSEC_RESCHED msecs_to_jiffies(1000)
#define MLX5E_IPSEC_TUNNEL_SA XA_MARK_1
@@ -858,6 +859,7 @@ void mlx5e_ipsec_init(struct mlx5e_priv *priv)
			goto clear_aso;
	}

	ipsec->is_uplink_rep = mlx5e_is_uplink_rep(priv);
	ret = mlx5e_accel_ipsec_fs_init(ipsec);
	if (ret)
		goto err_fs_init;
+57 −8
Original line number Diff line number Diff line
@@ -143,7 +143,7 @@ struct mlx5e_ipsec_sw_stats {
	atomic64_t ipsec_tx_drop_trailer;
};

struct mlx5e_ipsec_rx;
struct mlx5e_ipsec_fc;
struct mlx5e_ipsec_tx;

struct mlx5e_ipsec_work {
@@ -169,6 +169,58 @@ struct mlx5e_ipsec_aso {
	spinlock_t lock;
};

struct mlx5e_ipsec_rx_create_attr {
	struct mlx5_flow_namespace *ns;
	struct mlx5_ttc_table *ttc;
	u32 family;
	int prio;
	int pol_level;
	int sa_level;
	int status_level;
	enum mlx5_flow_namespace_type chains_ns;
};

struct mlx5e_ipsec_ft {
	struct mutex mutex; /* Protect changes to this struct */
	struct mlx5_flow_table *pol;
	struct mlx5_flow_table *sa;
	struct mlx5_flow_table *status;
	u32 refcnt;
};

struct mlx5e_ipsec_rule {
	struct mlx5_flow_handle *rule;
	struct mlx5_modify_hdr *modify_hdr;
	struct mlx5_pkt_reformat *pkt_reformat;
	struct mlx5_fc *fc;
};

struct mlx5e_ipsec_miss {
	struct mlx5_flow_group *group;
	struct mlx5_flow_handle *rule;
};

struct mlx5e_ipsec_rx {
	struct mlx5e_ipsec_ft ft;
	struct mlx5e_ipsec_miss pol;
	struct mlx5e_ipsec_miss sa;
	struct mlx5e_ipsec_rule status;
	struct mlx5e_ipsec_miss status_drop;
	struct mlx5_fc *status_drop_cnt;
	struct mlx5e_ipsec_fc *fc;
	struct mlx5_fs_chains *chains;
	u8 allow_tunnel_mode : 1;
	struct xarray ipsec_obj_id_map;
};

struct mlx5e_ipsec_tx_create_attr {
	int prio;
	int pol_level;
	int sa_level;
	int cnt_level;
	enum mlx5_flow_namespace_type chains_ns;
};

struct mlx5e_ipsec {
	struct mlx5_core_dev *mdev;
	struct xarray sadb;
@@ -178,11 +230,14 @@ struct mlx5e_ipsec {
	struct mlx5e_flow_steering *fs;
	struct mlx5e_ipsec_rx *rx_ipv4;
	struct mlx5e_ipsec_rx *rx_ipv6;
	struct mlx5e_ipsec_rx *rx_esw;
	struct mlx5e_ipsec_tx *tx;
	struct mlx5e_ipsec_tx *tx_esw;
	struct mlx5e_ipsec_aso *aso;
	struct notifier_block nb;
	struct notifier_block netevent_nb;
	struct mlx5_ipsec_fs *roce;
	u8 is_uplink_rep: 1;
};

struct mlx5e_ipsec_esn_state {
@@ -191,13 +246,6 @@ struct mlx5e_ipsec_esn_state {
	u8 overlap: 1;
};

struct mlx5e_ipsec_rule {
	struct mlx5_flow_handle *rule;
	struct mlx5_modify_hdr *modify_hdr;
	struct mlx5_pkt_reformat *pkt_reformat;
	struct mlx5_fc *fc;
};

struct mlx5e_ipsec_limits {
	u64 round;
	u8 soft_limit_hit : 1;
@@ -217,6 +265,7 @@ struct mlx5e_ipsec_sa_entry {
	struct mlx5e_ipsec_work *work;
	struct mlx5e_ipsec_dwork *dwork;
	struct mlx5e_ipsec_limits limits;
	u32 rx_mapped_id;
};

struct mlx5_accel_pol_xfrm_attrs {
+513 −195

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