Commit edbdfe64 authored by leoliuoc's avatar leoliuoc Committed by LeoLiu-oc
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cpufreq: ACPI: Add Zhaoxin/Centaur turbo boost control interface support

mainline inclusion
commit d6f89596
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I6SKVN


CVE: NA

--------------------------------------------

Recent Zhaoxin/Centaur CPUs support X86_FEATURE_IDA and the turbo boost
can be dynamically enabled or disabled through MSR 0x1a0[38] in the same
way as Intel. So add turbo boost control support for these CPUs too.

Signed-off-by: default avatarTony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: default avatarLeoLiu-oc <leoliu-oc@zhaoxin.com>
parent 4dc9009d
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+4 −0
Original line number Diff line number Diff line
@@ -78,6 +78,8 @@ static bool boost_state(unsigned int cpu)

	switch (boot_cpu_data.x86_vendor) {
	case X86_VENDOR_INTEL:
	case X86_VENDOR_CENTAUR:
	case X86_VENDOR_ZHAOXIN:
		rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
		msr = lo | ((u64)hi << 32);
		return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
@@ -97,6 +99,8 @@ static int boost_set_msr(bool enable)

	switch (boot_cpu_data.x86_vendor) {
	case X86_VENDOR_INTEL:
	case X86_VENDOR_CENTAUR:
	case X86_VENDOR_ZHAOXIN:
		msr_addr = MSR_IA32_MISC_ENABLE;
		msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
		break;