Commit edad83e2 authored by Daniel Machon's avatar Daniel Machon Committed by David S. Miller
Browse files

net: microchip: add registers needed for PSFP 



Add registers needed for PSFP. This patch also renames a single
register, shortening its name (SYS_CLK_PER_100PS). Uses have been update
accordingly.

Signed-off-by: default avatarDaniel Machon <daniel.machon@microchip.com>
Reviewed-by: default avatarSimon Horman <simon.horman@corigine.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 042b7858

drivers/net/ethernet/microchip/sparx5/sparx5_main.c

+3 −2
Original line number Diff line number Diff line
@@ -205,6 +205,7 @@ static const struct sparx5_main_io_resource sparx5_main_iomap[] = { 
	{ TARGET_EACL,               0x112c0000, 2 }, /* 0x6112c0000 */

	{ TARGET_ANA_CL,             0x11400000, 2 }, /* 0x611400000 */

	{ TARGET_ANA_L3,             0x11480000, 2 }, /* 0x611480000 */

	{ TARGET_ANA_AC_SDLB,        0x11500000, 2 }, /* 0x611500000 */

	{ TARGET_HSCH,               0x11580000, 2 }, /* 0x611580000 */

	{ TARGET_REW,                0x11600000, 2 }, /* 0x611600000 */

	{ TARGET_ANA_L2,             0x11800000, 2 }, /* 0x611800000 */
@@ -501,8 +502,8 @@ static int sparx5_init_coreclock(struct sparx5 *sparx5) 


	clk_period = sparx5_clk_period(freq);



	spx5_rmw(HSCH_SYS_CLK_PER_SYS_CLK_PER_100PS_SET(clk_period / 100),

		 HSCH_SYS_CLK_PER_SYS_CLK_PER_100PS,

	spx5_rmw(HSCH_SYS_CLK_PER_100PS_SET(clk_period / 100),

		 HSCH_SYS_CLK_PER_100PS,

		 sparx5,

		 HSCH_SYS_CLK_PER);

drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h

+576 −5

File changed.

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