Loading arch/sparc/include/asm/mmu_context_64.h +4 −4 Original line number Diff line number Diff line Loading @@ -121,8 +121,8 @@ static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, str * local TLB. */ cpu = smp_processor_id(); if (!ctx_valid || !cpu_isset(cpu, mm->cpu_vm_mask)) { cpu_set(cpu, mm->cpu_vm_mask); if (!ctx_valid || !cpumask_test_cpu(cpu, mm_cpumask(mm))) { cpumask_set_cpu(cpu, mm_cpumask(mm)); __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT); } Loading @@ -141,8 +141,8 @@ static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm if (!CTX_VALID(mm->context)) get_new_mmu_context(mm); cpu = smp_processor_id(); if (!cpu_isset(cpu, mm->cpu_vm_mask)) cpu_set(cpu, mm->cpu_vm_mask); if (!cpumask_test_cpu(cpu, mm_cpumask(mm))) cpumask_set_cpu(cpu, mm_cpumask(mm)); load_secondary_context(mm); __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT); Loading arch/sparc/include/asm/smp_64.h +2 −1 Original line number Diff line number Diff line Loading @@ -35,7 +35,8 @@ extern cpumask_t cpu_core_map[NR_CPUS]; extern int sparc64_multi_core; extern void arch_send_call_function_single_ipi(int cpu); extern void arch_send_call_function_ipi(cpumask_t mask); extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); #define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask /* * General functions that each host system must provide. Loading arch/sparc/include/asm/system_32.h +1 −1 Original line number Diff line number Diff line Loading @@ -126,7 +126,7 @@ extern void flushw_all(void); #define switch_to(prev, next, last) do { \ SWITCH_ENTER(prev); \ SWITCH_DO_LAZY_FPU(next); \ cpu_set(smp_processor_id(), next->active_mm->cpu_vm_mask); \ cpumask_set_cpu(smp_processor_id(), mm_cpumask(next->active_mm)); \ __asm__ __volatile__( \ "sethi %%hi(here - 0x8), %%o7\n\t" \ "mov %%g6, %%g3\n\t" \ Loading arch/sparc/include/asm/topology_64.h +1 −6 Original line number Diff line number Diff line Loading @@ -43,13 +43,9 @@ static inline int pcibus_to_node(struct pci_bus *pbus) } #endif #define pcibus_to_cpumask(bus) \ (pcibus_to_node(bus) == -1 ? \ CPU_MASK_ALL : \ node_to_cpumask(pcibus_to_node(bus))) #define cpumask_of_pcibus(bus) \ (pcibus_to_node(bus) == -1 ? \ CPU_MASK_ALL_PTR : \ cpu_all_mask : \ cpumask_of_node(pcibus_to_node(bus))) #define SD_NODE_INIT (struct sched_domain) { \ Loading Loading @@ -89,7 +85,6 @@ static inline int pcibus_to_node(struct pci_bus *pbus) #define smt_capable() (sparc64_multi_core) #endif /* CONFIG_SMP */ #define cpu_coregroup_map(cpu) (cpu_core_map[cpu]) #define cpu_coregroup_mask(cpu) (&cpu_core_map[cpu]) #endif /* _ASM_SPARC64_TOPOLOGY_H */ arch/sparc/kernel/ds.c +1 −1 Original line number Diff line number Diff line Loading @@ -653,7 +653,7 @@ static void __cpuinit dr_cpu_data(struct ds_info *dp, if (cpu_list[i] == CPU_SENTINEL) continue; if (cpu_list[i] < NR_CPUS) if (cpu_list[i] < nr_cpu_ids) cpu_set(cpu_list[i], mask); } Loading Loading
arch/sparc/include/asm/mmu_context_64.h +4 −4 Original line number Diff line number Diff line Loading @@ -121,8 +121,8 @@ static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, str * local TLB. */ cpu = smp_processor_id(); if (!ctx_valid || !cpu_isset(cpu, mm->cpu_vm_mask)) { cpu_set(cpu, mm->cpu_vm_mask); if (!ctx_valid || !cpumask_test_cpu(cpu, mm_cpumask(mm))) { cpumask_set_cpu(cpu, mm_cpumask(mm)); __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT); } Loading @@ -141,8 +141,8 @@ static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm if (!CTX_VALID(mm->context)) get_new_mmu_context(mm); cpu = smp_processor_id(); if (!cpu_isset(cpu, mm->cpu_vm_mask)) cpu_set(cpu, mm->cpu_vm_mask); if (!cpumask_test_cpu(cpu, mm_cpumask(mm))) cpumask_set_cpu(cpu, mm_cpumask(mm)); load_secondary_context(mm); __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT); Loading
arch/sparc/include/asm/smp_64.h +2 −1 Original line number Diff line number Diff line Loading @@ -35,7 +35,8 @@ extern cpumask_t cpu_core_map[NR_CPUS]; extern int sparc64_multi_core; extern void arch_send_call_function_single_ipi(int cpu); extern void arch_send_call_function_ipi(cpumask_t mask); extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); #define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask /* * General functions that each host system must provide. Loading
arch/sparc/include/asm/system_32.h +1 −1 Original line number Diff line number Diff line Loading @@ -126,7 +126,7 @@ extern void flushw_all(void); #define switch_to(prev, next, last) do { \ SWITCH_ENTER(prev); \ SWITCH_DO_LAZY_FPU(next); \ cpu_set(smp_processor_id(), next->active_mm->cpu_vm_mask); \ cpumask_set_cpu(smp_processor_id(), mm_cpumask(next->active_mm)); \ __asm__ __volatile__( \ "sethi %%hi(here - 0x8), %%o7\n\t" \ "mov %%g6, %%g3\n\t" \ Loading
arch/sparc/include/asm/topology_64.h +1 −6 Original line number Diff line number Diff line Loading @@ -43,13 +43,9 @@ static inline int pcibus_to_node(struct pci_bus *pbus) } #endif #define pcibus_to_cpumask(bus) \ (pcibus_to_node(bus) == -1 ? \ CPU_MASK_ALL : \ node_to_cpumask(pcibus_to_node(bus))) #define cpumask_of_pcibus(bus) \ (pcibus_to_node(bus) == -1 ? \ CPU_MASK_ALL_PTR : \ cpu_all_mask : \ cpumask_of_node(pcibus_to_node(bus))) #define SD_NODE_INIT (struct sched_domain) { \ Loading Loading @@ -89,7 +85,6 @@ static inline int pcibus_to_node(struct pci_bus *pbus) #define smt_capable() (sparc64_multi_core) #endif /* CONFIG_SMP */ #define cpu_coregroup_map(cpu) (cpu_core_map[cpu]) #define cpu_coregroup_mask(cpu) (&cpu_core_map[cpu]) #endif /* _ASM_SPARC64_TOPOLOGY_H */
arch/sparc/kernel/ds.c +1 −1 Original line number Diff line number Diff line Loading @@ -653,7 +653,7 @@ static void __cpuinit dr_cpu_data(struct ds_info *dp, if (cpu_list[i] == CPU_SENTINEL) continue; if (cpu_list[i] < NR_CPUS) if (cpu_list[i] < nr_cpu_ids) cpu_set(cpu_list[i], mask); } Loading