Commit ed1f31b4 authored by Steve Muckle's avatar Steve Muckle Committed by Daniel Walker
Browse files

msm: initial irq definitions for MSM8X60 



IRQ assignments are different for MSM8X60 than other existing MSMs.

Signed-off-by: default avatarSteve Muckle <smuckle@codeaurora.org>
Signed-off-by: default avatarDaniel Walker <dwalker@codeaurora.org>
parent 6cf6dfef

arch/arm/mach-msm/include/mach/irqs-8x60.h

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/* Copyright (c) 2010 Code Aurora Forum. All rights reserved.

 *

 * This software is licensed under the terms of the GNU General Public

 * License version 2, as published by the Free Software Foundation, and

 * may be copied, distributed, and modified under those terms.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 */



#ifndef __ASM_ARCH_MSM_IRQS_8X60_H

#define __ASM_ARCH_MSM_IRQS_8X60_H



/* MSM ACPU Interrupt Numbers */



/* 0-15:  STI/SGI (software triggered/generated interrupts)

 * 16-31: PPI (private peripheral interrupts)

 * 32+:   SPI (shared peripheral interrupts)

 */



#define NR_GPIO_IRQS 173

#define NR_MSM_IRQS 256

#define NR_BOARD_IRQS 0



#endif

arch/arm/mach-msm/include/mach/irqs.h

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@@ -24,6 +24,8 @@ 
#elif defined(CONFIG_ARCH_QSD8X50)

#include "irqs-8x50.h"

#include "sirc.h"

#elif defined(CONFIG_ARCH_MSM8X60)

#include "irqs-8x60.h"

#elif defined(CONFIG_ARCH_MSM_ARM11)

#include "irqs-7x00.h"

#else