Commit eca21315 authored by Cédric Le Goater's avatar Cédric Le Goater Committed by Thomas Gleixner
Browse files

powerpc/4xx: Complete removal of MSI support



Finish the work by removing all references to the PPC4xx_MSI config
and the associated device nodes in the DTs.

Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/e92f2bb3-b5e1-c870-8151-3917a789a640@kaod.org
parent 4f1d038b
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+0 −25
Original line number Diff line number Diff line
@@ -366,30 +366,5 @@
				0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
				0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
		};

		MSI: ppc4xx-msi@C10000000 {
			compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
			reg = < 0xC 0x10000000 0x100
				0xC 0x10000000 0x100>;
			sdr-base = <0x36C>;
			msi-data = <0x00004440>;
			msi-mask = <0x0000ffe0>;
			interrupts =<0 1 2 3 4 5 6 7>;
			interrupt-parent = <&MSI>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			msi-available-ranges = <0x0 0x100>;
			interrupt-map = <
				0 &UIC3 0x18 1
				1 &UIC3 0x19 1
				2 &UIC3 0x1A 1
				3 &UIC3 0x1B 1
				4 &UIC3 0x1C 1
				5 &UIC3 0x1D 1
				6 &UIC3 0x1E 1
				7 &UIC3 0x1F 1
			>;
		};
	};
};
+0 −18
Original line number Diff line number Diff line
@@ -544,23 +544,5 @@
				0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */
				0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>;
		};

		MSI: ppc4xx-msi@C10000000 {
			compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
			reg = < 0xC 0x10000000 0x100>;
			sdr-base = <0x36C>;
			msi-data = <0x00000000>;
			msi-mask = <0x44440000>;
			interrupt-count = <3>;
			interrupts = <0 1 2 3>;
			interrupt-parent = <&UIC3>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = <0 &UIC3 0x18 1
					1 &UIC3 0x19 1
					2 &UIC3 0x1A 1
					3 &UIC3 0x1B 1>;
		};
	};
};
+0 −18
Original line number Diff line number Diff line
@@ -442,24 +442,6 @@
				0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
		};

		MSI: ppc4xx-msi@400300000 {
				compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
				reg = < 0x4 0x00300000 0x100>;
				sdr-base = <0x3B0>;
				msi-data = <0x00000000>;
				msi-mask = <0x44440000>;
				interrupt-count = <3>;
				interrupts =<0 1 2 3>;
				interrupt-parent = <&UIC0>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = <0 &UIC0 0xC 1
					1 &UIC0 0x0D 1
					2 &UIC0 0x0E 1
					3 &UIC0 0x0F 1>;
		};

		I2O: i2o@400100000 {
			compatible = "ibm,i2o-440spe";
			reg = <0x00000004 0x00100000 0x100>;
+0 −28
Original line number Diff line number Diff line
@@ -403,33 +403,5 @@
				0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
				0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
		};

		MSI: ppc4xx-msi@C10000000 {
			compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
			reg = <0xEF620000 0x100>;
			sdr-base = <0x4B0>;
			msi-data = <0x00000000>;
			msi-mask = <0x44440000>;
			interrupt-count = <12>;
			interrupts = <0 1 2 3 4 5 6 7 8 9 0xA 0xB 0xC 0xD>;
			interrupt-parent = <&UIC2>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = <0 &UIC2 0x10 1
					1 &UIC2 0x11 1
					2 &UIC2 0x12 1
					2 &UIC2 0x13 1
					2 &UIC2 0x14 1
					2 &UIC2 0x15 1
					2 &UIC2 0x16 1
					2 &UIC2 0x17 1
					2 &UIC2 0x18 1
					2 &UIC2 0x19 1
					2 &UIC2 0x1A 1
					2 &UIC2 0x1B 1
					2 &UIC2 0x1C 1
					3 &UIC2 0x1D 1>;
		};
	};
};
+0 −19
Original line number Diff line number Diff line
@@ -358,25 +358,6 @@
				0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
		};

		MSI: ppc4xx-msi@400300000 {
				compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
				reg = < 0x4 0x00300000 0x100
					0x4 0x00300000 0x100>;
				sdr-base = <0x3B0>;
				msi-data = <0x00000000>;
				msi-mask = <0x44440000>;
				interrupt-count = <3>;
				interrupts =<0 1 2 3>;
				interrupt-parent = <&UIC0>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = <0 &UIC0 0xC 1
					1 &UIC0 0x0D 1
					2 &UIC0 0x0E 1
					3 &UIC0 0x0F 1>;
		};

	};


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