Commit ec69dfbd authored by Bjorn Andersson's avatar Bjorn Andersson
Browse files

soc: qcom: llcc: Add sc8180x and sc8280xp configurations 



Add LLCC configuration data for the SC8180X and SC8280XP platforms,
based on the downstream tables.

Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: default avatarSai Prakash Ranjan <quic_saipraka@quicinc.com>
Link: https://lore.kernel.org/r/20220502215406.612967-3-bjorn.andersson@linaro.org
parent d0d8cb7b

drivers/soc/qcom/llcc-qcom.c

+60 −0
Original line number Diff line number Diff line
@@ -130,6 +130,50 @@ static const struct llcc_slice_config sc7280_data[] = { 
	{ LLCC_MODPE,    29, 64,  1, 1, 0x3f, 0x0, 0, 0, 0, 1, 0, 0},

};



static const struct llcc_slice_config sc8180x_data[] = {

	{ LLCC_CPUSS,    1, 6144,  1, 1, 0xfff, 0x0,   0, 0, 0, 1, 1 },

	{ LLCC_VIDSC0,   2, 512,   2, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_VIDSC1,   3, 512,   2, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_AUDIO,    6, 1024,  1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_MDMHPGRW, 7, 3072,  1, 1, 0x3ff, 0xc00, 0, 0, 0, 1, 0 },

	{ LLCC_MDM,      8, 3072,  1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_MODHW,    9, 1024,  1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_CMPT,     10, 6144, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_GPUHTW,   11, 1024, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_GPU,      12, 5120, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_MMUHWT,   13, 1024, 1, 1, 0xfff, 0x0,   0, 0, 0, 0, 1 },

	{ LLCC_CMPTDMA,  15, 6144, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_DISP,     16, 6144, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_VIDFW,    17, 1024, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_MDMHPFX,  20, 1024, 2, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_MDMPNG,   21, 1024, 0, 1, 0xc,   0x0,   0, 0, 0, 1, 0 },

	{ LLCC_AUDHW,    22, 1024, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_NPU,      23, 6144, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_WLHW,     24, 6144, 1, 1, 0xfff, 0x0,   0, 0, 0, 1, 0 },

	{ LLCC_MODPE,    29, 512,  1, 1, 0xc,   0x0,   0, 0, 0, 1, 0 },

	{ LLCC_APTCM,    30, 512,  3, 1, 0x0,   0x1,   1, 0, 0, 1, 0 },

	{ LLCC_WRCACHE,  31, 128,  1, 1, 0xfff, 0x0,   0, 0, 0, 0, 0 },

};



static const struct llcc_slice_config sc8280xp_data[] = {

	{ LLCC_CPUSS,    1,  6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 1, 0 },

	{ LLCC_VIDSC0,   2,  512,  3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },

	{ LLCC_AUDIO,    6,  1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },

	{ LLCC_CMPT,     10, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 0, 0 },

	{ LLCC_GPUHTW,   11, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },

	{ LLCC_GPU,      12, 4096, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 1 },

	{ LLCC_MMUHWT,   13, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },

	{ LLCC_DISP,     16, 6144, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },

	{ LLCC_AUDHW,    22, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },

	{ LLCC_DRE,      26, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },

	{ LLCC_CVP,      28, 512,  3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },

	{ LLCC_APTCM,    30, 1024, 3, 1, 0x0,   0x1, 1, 0, 0, 1, 0, 0 },

	{ LLCC_WRCACHE,  31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },

	{ LLCC_CVPFW,    32, 512,  1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },

	{ LLCC_CPUSS1,   33, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },

	{ LLCC_CPUHWT,   36, 512,  1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },

};



static const struct llcc_slice_config sdm845_data[] =  {

	{ LLCC_CPUSS,    1,  2816, 1, 0, 0xffc, 0x2,   0, 0, 1, 1, 1 },

	{ LLCC_VIDSC0,   2,  512,  2, 1, 0x0,   0x0f0, 0, 0, 1, 1, 0 },
@@ -276,6 +320,20 @@ static const struct qcom_llcc_config sc7280_cfg = { 
	.reg_offset	= llcc_v1_2_reg_offset,

};



static const struct qcom_llcc_config sc8180x_cfg = {

	.sct_data	= sc8180x_data,

	.size		= ARRAY_SIZE(sc8180x_data),

	.need_llcc_cfg	= true,

	.reg_offset	= llcc_v1_2_reg_offset,

};



static const struct qcom_llcc_config sc8280xp_cfg = {

	.sct_data	= sc8280xp_data,

	.size		= ARRAY_SIZE(sc8280xp_data),

	.need_llcc_cfg	= true,

	.reg_offset	= llcc_v1_2_reg_offset,

};



static const struct qcom_llcc_config sdm845_cfg = {

	.sct_data	= sdm845_data,

	.size		= ARRAY_SIZE(sdm845_data),
@@ -741,6 +799,8 @@ static int qcom_llcc_probe(struct platform_device *pdev) 
static const struct of_device_id qcom_llcc_of_match[] = {

	{ .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfg },

	{ .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfg },

	{ .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfg },

	{ .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfg },

	{ .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfg },

	{ .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfg },

	{ .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfg },

include/linux/soc/qcom/llcc-qcom.h

+2 −0
Original line number Diff line number Diff line
@@ -29,6 +29,8 @@ 
#define LLCC_AUDHW       22

#define LLCC_NPU         23

#define LLCC_WLHW        24

#define LLCC_PIMEM       25

#define LLCC_DRE         26

#define LLCC_CVP         28

#define LLCC_MODPE       29

#define LLCC_APTCM       30