Commit ec5c3a35 authored by Michael Ellerman's avatar Michael Ellerman
Browse files

Merge branch 'fixes' into next 

Merge our fixes branch to bring in a few things that new feature patches
rely on or conflict with.
parents 3d7a198c a66de528

arch/powerpc/include/asm/firmware.h

+8 −0
Original line number Diff line number Diff line
@@ -83,6 +83,8 @@ enum { 
	FW_FEATURE_POWERNV_ALWAYS = 0,

	FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,

	FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1,

	FW_FEATURE_NATIVE_POSSIBLE = 0,

	FW_FEATURE_NATIVE_ALWAYS = 0,

	FW_FEATURE_POSSIBLE =

#ifdef CONFIG_PPC_PSERIES

		FW_FEATURE_PSERIES_POSSIBLE |
@@ -92,6 +94,9 @@ enum { 
#endif

#ifdef CONFIG_PPC_PS3

		FW_FEATURE_PS3_POSSIBLE |

#endif

#ifdef CONFIG_PPC_HASH_MMU_NATIVE

		FW_FEATURE_NATIVE_ALWAYS |

#endif

		0,

	FW_FEATURE_ALWAYS =
@@ -103,6 +108,9 @@ enum { 
#endif

#ifdef CONFIG_PPC_PS3

		FW_FEATURE_PS3_ALWAYS &

#endif

#ifdef CONFIG_PPC_HASH_MMU_NATIVE

		FW_FEATURE_NATIVE_ALWAYS &

#endif

		FW_FEATURE_POSSIBLE,

arch/powerpc/include/asm/hw_irq.h

+38 −8
Original line number Diff line number Diff line
@@ -113,7 +113,14 @@ static inline void __hard_RI_enable(void) 


static inline notrace unsigned long irq_soft_mask_return(void)

{

	return READ_ONCE(local_paca->irq_soft_mask);

	unsigned long flags;



	asm volatile(

		"lbz %0,%1(13)"

		: "=r" (flags)

		: "i" (offsetof(struct paca_struct, irq_soft_mask)));



	return flags;

}



/*
@@ -140,24 +147,46 @@ static inline notrace void irq_soft_mask_set(unsigned long mask) 
	if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))

		WARN_ON(mask && !(mask & IRQS_DISABLED));



	WRITE_ONCE(local_paca->irq_soft_mask, mask);

	barrier();

	asm volatile(

		"stb %0,%1(13)"

		:

		: "r" (mask),

		  "i" (offsetof(struct paca_struct, irq_soft_mask))

		: "memory");

}



static inline notrace unsigned long irq_soft_mask_set_return(unsigned long mask)

{

	unsigned long flags = irq_soft_mask_return();

	unsigned long flags;



#ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG

	WARN_ON(mask && !(mask & IRQS_DISABLED));

#endif



	irq_soft_mask_set(mask);

	asm volatile(

		"lbz %0,%1(13); stb %2,%1(13)"

		: "=&r" (flags)

		: "i" (offsetof(struct paca_struct, irq_soft_mask)),

		  "r" (mask)

		: "memory");



	return flags;

}



static inline notrace unsigned long irq_soft_mask_or_return(unsigned long mask)

{

	unsigned long flags = irq_soft_mask_return();

	unsigned long flags, tmp;



	irq_soft_mask_set(flags | mask);

	asm volatile(

		"lbz %0,%2(13); or %1,%0,%3; stb %1,%2(13)"

		: "=&r" (flags), "=r" (tmp)

		: "i" (offsetof(struct paca_struct, irq_soft_mask)),

		  "r" (mask)

		: "memory");



#ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG

	WARN_ON((mask | flags) && !((mask | flags) & IRQS_DISABLED));

#endif



	return flags;

}
@@ -282,7 +311,8 @@ static inline bool pmi_irq_pending(void) 
	flags = irq_soft_mask_set_return(IRQS_ALL_DISABLED);		\

	local_paca->irq_happened |= PACA_IRQ_HARD_DIS;			\

	if (!arch_irqs_disabled_flags(flags)) {				\

		WRITE_ONCE(local_paca->saved_r1, current_stack_pointer);\

		asm volatile("std%X0 %1,%0" : "=m" (local_paca->saved_r1) \

					    : "r" (current_stack_pointer)); \

		trace_hardirqs_off();					\

	}								\

} while(0)

arch/powerpc/kernel/pci_32.c

+9 −0
Original line number Diff line number Diff line
@@ -245,6 +245,15 @@ static int __init pcibios_init(void) 


	printk(KERN_INFO "PCI: Probing PCI hardware\n");



#ifdef CONFIG_PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT

	/*

	 * Enable PCI domains in /proc when PCI bus numbers are not unique

	 * across all PCI domains to prevent conflicts. And keep PCI domain 0

	 * backward compatible in /proc for video cards.

	 */

	pci_add_flags(PCI_ENABLE_PROC_DOMAINS | PCI_COMPAT_DOMAIN_0);

#endif



	if (pci_has_flag(PCI_REASSIGN_ALL_BUS))

		pci_assign_all_buses = 1;

arch/powerpc/kernel/rtas_entry.S

+4 −0
Original line number Diff line number Diff line
@@ -109,8 +109,12 @@ __enter_rtas: 
	 * its critical regions (as specified in PAPR+ section 7.2.1). MSR[S]

	 * is not impacted by RFI_TO_KERNEL (only urfid can unset it). So if

	 * MSR[S] is set, it will remain when entering RTAS.

	 * If we're in HV mode, RTAS must also run in HV mode, so extract MSR_HV

	 * from the saved MSR value and insert into the value RTAS will use.

	 */

	extrdi	r0, r6, 1, 63 - MSR_HV_LG

	LOAD_REG_IMMEDIATE(r6, MSR_ME | MSR_RI)

	insrdi	r6, r0, 1, 63 - MSR_HV_LG



	li      r0,0

	mtmsrd  r0,1                    /* disable RI before using SRR0/1 */

arch/powerpc/kernel/systbl.S

+1 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 
	.p2align	3

#define __SYSCALL(nr, entry)	.8byte entry

#else

	.p2align	2

#define __SYSCALL(nr, entry)	.long entry

#endif