Commit ebd326ce authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'locking-core-2022-03-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull locking updates from Ingo Molnar:
 "Changes in this cycle were:

  Bitops & cpumask:
   - Always inline various generic helpers, to improve code generation,
     but also for instrumentation, found by noinstr validation.

   - Add a x86-specific cpumask_clear_cpu() helper to improve code
     generation

  Atomics:
   - Fix atomic64_{read_acquire,set_release} fallbacks

  Lockdep:
   - Fix /proc/lockdep output loop iteration for classes

   - Fix /proc/lockdep potential access to invalid memory

   - Add Mark Rutland as reviewer for atomic primitives

   - Minor cleanups

  Jump labels:
   - Clean up the code a bit

  Misc:
   - Add __sched annotations to percpu rwsem primitives

   - Enable RT_MUTEXES on PREEMPT_RT by default

   - Stray v8086_mode() inlining fix, result of noinstr objtool
     validation"

* tag 'locking-core-2022-03-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  jump_label: Refactor #ifdef of struct static_key
  jump_label: Avoid unneeded casts in STATIC_KEY_INIT_{TRUE,FALSE}
  locking/lockdep: Iterate lock_classes directly when reading lockdep files
  x86/ptrace: Always inline v8086_mode() for instrumentation
  cpumask: Add a x86-specific cpumask_clear_cpu() helper
  locking: Enable RT_MUTEXES by default on PREEMPT_RT.
  locking/local_lock: Make the empty local_lock_*() function a macro.
  atomics: Fix atomic64_{read_acquire,set_release} fallbacks
  locking: Add missing __sched attributes
  cpumask: Always inline helpers which use bit manipulation functions
  asm-generic/bitops: Always inline all bit manipulation helpers
  locking/lockdep: Avoid potential access of invalid memory in lock_class
  lockdep: Use memset_startat() helper in reinit_class()
  MAINTAINERS: add myself as reviewer for atomics
parents 95ab0e87 cd27ccfc

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -3205,6 +3205,7 @@ ATOMIC INFRASTRUCTURE 
M:	Will Deacon <will@kernel.org>

M:	Peter Zijlstra <peterz@infradead.org>

R:	Boqun Feng <boqun.feng@gmail.com>

R:	Mark Rutland <mark.rutland@arm.com>

L:	linux-kernel@vger.kernel.org

S:	Maintained

F:	arch/*/include/asm/atomic*.h

arch/x86/include/asm/cpumask.h

+10 −0
Original line number Diff line number Diff line
@@ -20,11 +20,21 @@ static __always_inline bool arch_cpu_online(int cpu) 
{

	return arch_test_bit(cpu, cpumask_bits(cpu_online_mask));

}



static __always_inline void arch_cpumask_clear_cpu(int cpu, struct cpumask *dstp)

{

	arch_clear_bit(cpumask_check(cpu), cpumask_bits(dstp));

}

#else

static __always_inline bool arch_cpu_online(int cpu)

{

	return cpu == 0;

}



static __always_inline void arch_cpumask_clear_cpu(int cpu, struct cpumask *dstp)

{

	return;

}

#endif



#define arch_cpu_is_offline(cpu)	unlikely(!arch_cpu_online(cpu))

arch/x86/include/asm/ptrace.h

+1 −1
Original line number Diff line number Diff line
@@ -137,7 +137,7 @@ static __always_inline int user_mode(struct pt_regs *regs) 
#endif

}



static inline int v8086_mode(struct pt_regs *regs)

static __always_inline int v8086_mode(struct pt_regs *regs)

{

#ifdef CONFIG_X86_32

	return (regs->flags & X86_VM_MASK);

include/asm-generic/bitops/instrumented-atomic.h

+6 −6
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@ 
 * Note that @nr may be almost arbitrarily large; this function is not

 * restricted to acting on a single-word quantity.

 */

static inline void set_bit(long nr, volatile unsigned long *addr)

static __always_inline void set_bit(long nr, volatile unsigned long *addr)

{

	instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));

	arch_set_bit(nr, addr);
@@ -36,7 +36,7 @@ static inline void set_bit(long nr, volatile unsigned long *addr) 
 *

 * This is a relaxed atomic operation (no implied memory barriers).

 */

static inline void clear_bit(long nr, volatile unsigned long *addr)

static __always_inline void clear_bit(long nr, volatile unsigned long *addr)

{

	instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));

	arch_clear_bit(nr, addr);
@@ -52,7 +52,7 @@ static inline void clear_bit(long nr, volatile unsigned long *addr) 
 * Note that @nr may be almost arbitrarily large; this function is not

 * restricted to acting on a single-word quantity.

 */

static inline void change_bit(long nr, volatile unsigned long *addr)

static __always_inline void change_bit(long nr, volatile unsigned long *addr)

{

	instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));

	arch_change_bit(nr, addr);
@@ -65,7 +65,7 @@ static inline void change_bit(long nr, volatile unsigned long *addr) 
 *

 * This is an atomic fully-ordered operation (implied full memory barrier).

 */

static inline bool test_and_set_bit(long nr, volatile unsigned long *addr)

static __always_inline bool test_and_set_bit(long nr, volatile unsigned long *addr)

{

	kcsan_mb();

	instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
@@ -79,7 +79,7 @@ static inline bool test_and_set_bit(long nr, volatile unsigned long *addr) 
 *

 * This is an atomic fully-ordered operation (implied full memory barrier).

 */

static inline bool test_and_clear_bit(long nr, volatile unsigned long *addr)

static __always_inline bool test_and_clear_bit(long nr, volatile unsigned long *addr)

{

	kcsan_mb();

	instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
@@ -93,7 +93,7 @@ static inline bool test_and_clear_bit(long nr, volatile unsigned long *addr) 
 *

 * This is an atomic fully-ordered operation (implied full memory barrier).

 */

static inline bool test_and_change_bit(long nr, volatile unsigned long *addr)

static __always_inline bool test_and_change_bit(long nr, volatile unsigned long *addr)

{

	kcsan_mb();

	instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));

include/asm-generic/bitops/instrumented-non-atomic.h

+8 −8
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ 
 * region of memory concurrently, the effect may be that only one operation

 * succeeds.

 */

static inline void __set_bit(long nr, volatile unsigned long *addr)

static __always_inline void __set_bit(long nr, volatile unsigned long *addr)

{

	instrument_write(addr + BIT_WORD(nr), sizeof(long));

	arch___set_bit(nr, addr);
@@ -37,7 +37,7 @@ static inline void __set_bit(long nr, volatile unsigned long *addr) 
 * region of memory concurrently, the effect may be that only one operation

 * succeeds.

 */

static inline void __clear_bit(long nr, volatile unsigned long *addr)

static __always_inline void __clear_bit(long nr, volatile unsigned long *addr)

{

	instrument_write(addr + BIT_WORD(nr), sizeof(long));

	arch___clear_bit(nr, addr);
@@ -52,13 +52,13 @@ static inline void __clear_bit(long nr, volatile unsigned long *addr) 
 * region of memory concurrently, the effect may be that only one operation

 * succeeds.

 */

static inline void __change_bit(long nr, volatile unsigned long *addr)

static __always_inline void __change_bit(long nr, volatile unsigned long *addr)

{

	instrument_write(addr + BIT_WORD(nr), sizeof(long));

	arch___change_bit(nr, addr);

}



static inline void __instrument_read_write_bitop(long nr, volatile unsigned long *addr)

static __always_inline void __instrument_read_write_bitop(long nr, volatile unsigned long *addr)

{

	if (IS_ENABLED(CONFIG_KCSAN_ASSUME_PLAIN_WRITES_ATOMIC)) {

		/*
@@ -90,7 +90,7 @@ static inline void __instrument_read_write_bitop(long nr, volatile unsigned long 
 * This operation is non-atomic. If two instances of this operation race, one

 * can appear to succeed but actually fail.

 */

static inline bool __test_and_set_bit(long nr, volatile unsigned long *addr)

static __always_inline bool __test_and_set_bit(long nr, volatile unsigned long *addr)

{

	__instrument_read_write_bitop(nr, addr);

	return arch___test_and_set_bit(nr, addr);
@@ -104,7 +104,7 @@ static inline bool __test_and_set_bit(long nr, volatile unsigned long *addr) 
 * This operation is non-atomic. If two instances of this operation race, one

 * can appear to succeed but actually fail.

 */

static inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr)

static __always_inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr)

{

	__instrument_read_write_bitop(nr, addr);

	return arch___test_and_clear_bit(nr, addr);
@@ -118,7 +118,7 @@ static inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr) 
 * This operation is non-atomic. If two instances of this operation race, one

 * can appear to succeed but actually fail.

 */

static inline bool __test_and_change_bit(long nr, volatile unsigned long *addr)

static __always_inline bool __test_and_change_bit(long nr, volatile unsigned long *addr)

{

	__instrument_read_write_bitop(nr, addr);

	return arch___test_and_change_bit(nr, addr);
@@ -129,7 +129,7 @@ static inline bool __test_and_change_bit(long nr, volatile unsigned long *addr) 
 * @nr: bit number to test

 * @addr: Address to start counting from

 */

static inline bool test_bit(long nr, const volatile unsigned long *addr)

static __always_inline bool test_bit(long nr, const volatile unsigned long *addr)

{

	instrument_atomic_read(addr + BIT_WORD(nr), sizeof(long));

	return arch_test_bit(nr, addr);