Commit ebb81c14 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mailbox-v5.14' of git://git.linaro.org/landing-teams/working/fujitsu/integration 

Pull mailbox updates from Jassi Brar:

 - imx: add support for i.MX8ULP

 - mtk: code change around callback struct

 - qcom: add sm6125, MSM8939 fix for channel exhaustion

 - microchip: add support for polarfire controller

 - misc: cosmetic changes to bcm-2835,flexrm,pdc, arm-mhu and hisilicon

* tag 'mailbox-v5.14' of git://git.linaro.org/landing-teams/working/fujitsu/integration: (26 commits)
  MAINTAINERS: add entry for polarfire soc mailbox
  dt-bindings: add bindings for polarfire soc system controller
  mbox: add polarfire soc system controller mailbox
  dt-bindings: add bindings for polarfire soc mailbox
  mailbox: imx: Avoid using val uninitialized in imx_mu_isr()
  mailbox: qcom: Add MSM8939 APCS support
  mailbox: qcom: Use PLATFORM_DEVID_AUTO to register platform device
  dt-bindings: mailbox: qcom: Add MSM8939 APCS compatible
  mailbox: qcom-apcs: Add SM6125 compatible
  dt-bindings: mailbox: Add binding for sm6125
  mailbox: mtk-cmdq: Fix uninitialized variable in cmdq_mbox_flush()
  mailbox: bcm-flexrm-mailbox: Remove redundant dev_err call in flexrm_mbox_probe()
  mailbox: bcm2835: Remove redundant dev_err call in bcm2835_mbox_probe()
  mailbox: qcom-ipcc: Fix IPCC mbox channel exhaustion
  mailbox: mtk-cmdq: Add struct cmdq_pkt in struct cmdq_cb_data
  mailbox: mtk-cmdq: Use mailbox rx_callback
  mailbox: mtk-cmdq: Remove cmdq_cb_status
  mailbox: imx-mailbox: support i.MX8ULP MU
  mailbox: imx: add xSR/xCR register array
  mailbox: imx: replace the xTR/xRR array with single register
  ...
parents c0c6d209 4f197188

Documentation/devicetree/bindings/mailbox/fsl,mu.yaml

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ properties: 
    oneOf:

      - const: fsl,imx6sx-mu

      - const: fsl,imx7ulp-mu

      - const: fsl,imx8ulp-mu

      - const: fsl,imx8-mu-scu

      - items:

          - enum:

Documentation/devicetree/bindings/mailbox/microchip,polarfire-soc-mailbox.yaml

0 → 100644
+47 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: "http://devicetree.org/schemas/mailbox/microchip,polarfire-soc-mailbox.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller



maintainers:

  - Conor Dooley <conor.dooley@microchip.com>



properties:

  compatible:

    const: microchip,polarfire-soc-mailbox



  reg:

    items:

      - description: mailbox data registers

      - description: mailbox interrupt registers



  interrupts:

    maxItems: 1



  "#mbox-cells":

    const: 1



required:

  - compatible

  - reg

  - interrupts

  - "#mbox-cells"



additionalProperties: false



examples:

  - |

    soc {

      #address-cells = <2>;

      #size-cells = <2>;

      mbox: mailbox@37020000 {

        compatible = "microchip,polarfire-soc-mailbox";

        reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>;

        interrupt-parent = <&L1>;

        interrupts = <96>;

        #mbox-cells = <1>;

      };

    };

Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml

+3 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ properties: 
      - qcom,ipq6018-apcs-apps-global

      - qcom,ipq8074-apcs-apps-global

      - qcom,msm8916-apcs-kpss-global

      - qcom,msm8939-apcs-kpss-global

      - qcom,msm8994-apcs-kpss-global

      - qcom,msm8996-apcs-hmss-global

      - qcom,msm8998-apcs-hmss-global
@@ -27,6 +28,7 @@ properties: 
      - qcom,sc8180x-apss-shared

      - qcom,sdm660-apcs-hmss-global

      - qcom,sdm845-apss-shared

      - qcom,sm6125-apcs-hmss-global

      - qcom,sm8150-apss-shared



  reg:
@@ -75,6 +77,7 @@ allOf: 
            - qcom,sc7180-apss-shared

            - qcom,sdm660-apcs-hmss-global

            - qcom,sdm845-apss-shared

            - qcom,sm6125-apcs-hmss-global

            - qcom,sm8150-apss-shared

    then:

      properties:

Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml

0 → 100644
+35 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: "http://devicetree.org/schemas/soc/microchip/microchip,polarfire-soc-sys-controller.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) system controller



maintainers:

  - Conor Dooley <conor.dooley@microchip.com>



description: |

  The PolarFire SoC system controller is communicated with via a mailbox.

  This document describes the bindings for the client portion of that mailbox.





properties:

  mboxes:

    maxItems: 1



  compatible:

    const: microchip,polarfire-soc-sys-controller



required:

  - compatible

  - mboxes



additionalProperties: false



examples:

  - |

    syscontroller: syscontroller {

      compatible = "microchip,polarfire-soc-sys-controller";

      mboxes = <&mbox 0>;

    };

MAINTAINERS

+9 −0
Original line number Diff line number Diff line
@@ -10872,6 +10872,7 @@ S: Maintained 
F:	drivers/mailbox/

F:	include/linux/mailbox_client.h

F:	include/linux/mailbox_controller.h

F:	include/dt-bindings/mailbox/

F:	Documentation/devicetree/bindings/mailbox/









MAILBOX ARM MHUv2








@@ -15728,6 +15729,14 @@ F:	arch/riscv/







N:	riscv









K:	riscv

















RISC-V/MICROCHIP POLARFIRE SOC SUPPORT









M:	Lewis Hanly <lewis.hanly@microchip.com>









L:	linux-riscv@lists.infradead.org









S:	Supported









F:	drivers/mailbox/mailbox-mpfs.c









F:	drivers/soc/microchip/









F:	include/soc/microchip/mpfs.h

















RNBD BLOCK DRIVERS









M:	Md. Haris Iqbal <haris.iqbal@ionos.com>









M:	Jack Wang <jinpu.wang@ionos.com>