Commit eba54cbb authored Aug 19, 2021 by Vladimir Oltean Committed by Thomas Bogendoerfer Aug 21, 2021

MIPS: mscc: ocelot: mark the phy-mode for internal PHY ports

The ocelot driver was converted to phylink, and that expects a valid
phy_interface_t. Without a phy-mode, of_get_phy_mode returns
PHY_INTERFACE_MODE_NA, which is not ideal because phylink rejects that.

The ocelot driver was patched to treat PHY_INTERFACE_MODE_NA as
PHY_INTERFACE_MODE_INTERNAL to work with the broken DT blobs, but we
should fix the device trees and specify the phy-mode too.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

parent 0181f6f1

arch/mips/boot/dts/mscc/ocelot_pcb120.dts

+4 −0

Original line number	Diff line number	Diff line
		@@ -71,21 +71,25 @@
		&port0 {
		status = "okay";
		phy-handle = <&phy0>;
		phy-mode = "internal";
		};

		&port1 {
		status = "okay";
		phy-handle = <&phy1>;
		phy-mode = "internal";
		};

		&port2 {
		status = "okay";
		phy-handle = <&phy2>;
		phy-mode = "internal";
		};

		&port3 {
		status = "okay";
		phy-handle = <&phy3>;
		phy-mode = "internal";
		};

		&port4 {

arch/mips/boot/dts/mscc/ocelot_pcb123.dts

+4 −0

Original line number	Diff line number	Diff line
		@@ -49,19 +49,23 @@
		&port0 {
		status = "okay";
		phy-handle = <&phy0>;
		phy-mode = "internal";
		};

		&port1 {
		status = "okay";
		phy-handle = <&phy1>;
		phy-mode = "internal";
		};

		&port2 {
		status = "okay";
		phy-handle = <&phy2>;
		phy-mode = "internal";
		};

		&port3 {
		status = "okay";
		phy-handle = <&phy3>;
		phy-mode = "internal";
		};