Commit eb67d239 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-6.2-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux 

Pull RISC-V updates from Palmer Dabbelt:

 - Support for the T-Head PMU via the perf subsystem

 - ftrace support for rv32

 - Support for non-volatile memory devices

 - Various fixes and cleanups

* tag 'riscv-for-linus-6.2-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (52 commits)
  Documentation: RISC-V: patch-acceptance: s/implementor/implementer
  Documentation: RISC-V: Mention the UEFI Standards
  Documentation: RISC-V: Allow patches for non-standard behavior
  Documentation: RISC-V: Fix a typo in patch-acceptance
  riscv: Fixup compile error with !MMU
  riscv: Fix P4D_SHIFT definition for 3-level page table mode
  riscv: Apply a static assert to riscv_isa_ext_id
  RISC-V: Add some comments about the shadow and overflow stacks
  RISC-V: Align the shadow stack
  RISC-V: Ensure Zicbom has a valid block size
  RISC-V: Introduce riscv_isa_extension_check
  RISC-V: Improve use of isa2hwcap[]
  riscv: Don't duplicate _ALTERNATIVE_CFG* macros
  riscv: alternatives: Drop the underscores from the assembly macro names
  riscv: alternatives: Don't name unused macro parameters
  riscv: Don't duplicate __ALTERNATIVE_CFG in __ALTERNATIVE_CFG_2
  riscv: mm: call best_map_size many times during linear-mapping
  riscv: Move cast inside kernel_mapping_[pv]a_to_[vp]a
  riscv: Fix crash during early errata patching
  riscv: boot: add zstd support
  ...
parents 94a85511 6e66e96e

Documentation/admin-guide/kdump/vmcoreinfo.rst

+29 −0
Original line number Diff line number Diff line
@@ -595,3 +595,32 @@ X2TLB 
-----



Indicates whether the crashed kernel enabled SH extended mode.



RISCV64

=======



VA_BITS

-------



The maximum number of bits for virtual addresses. Used to compute the

virtual memory ranges.



PAGE_OFFSET

-----------



Indicates the virtual kernel start address of the direct-mapped RAM region.



phys_ram_base

-------------



Indicates the start physical RAM address.



MODULES_VADDR|MODULES_END|VMALLOC_START|VMALLOC_END|VMEMMAP_START|VMEMMAP_END|KERNEL_LINK_ADDR

----------------------------------------------------------------------------------------------



Used to get the correct ranges:



  * MODULES_VADDR ~ MODULES_END : Kernel module space.

  * VMALLOC_START ~ VMALLOC_END : vmalloc() / ioremap() space.

  * VMEMMAP_START ~ VMEMMAP_END : vmemmap space, used for struct page array.

  * KERNEL_LINK_ADDR : start address of Kernel link and BPF

Documentation/features/vm/huge-vmap/arch-support.txt

+1 −1
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ 
    |    openrisc: | TODO |

    |      parisc: | TODO |

    |     powerpc: |  ok  |

    |       riscv: | TODO |

    |       riscv: |  ok  |

    |        s390: | TODO |

    |          sh: | TODO |

    |       sparc: | TODO |

Documentation/riscv/patch-acceptance.rst

+14 −8
Original line number Diff line number Diff line
@@ -20,16 +20,22 @@ Submit Checklist Addendum 
-------------------------

We'll only accept patches for new modules or extensions if the

specifications for those modules or extensions are listed as being

"Frozen" or "Ratified" by the RISC-V Foundation.  (Developers may, of

course, maintain their own Linux kernel trees that contain code for

any draft extensions that they wish.)

unlikely to be incompatibly changed in the future.  For

specifications from the RISC-V foundation this means "Frozen" or

"Ratified", for the UEFI forum specifications this means a published

ECR.  (Developers may, of course, maintain their own Linux kernel trees

that contain code for any draft extensions that they wish.)



Additionally, the RISC-V specification allows implementors to create

Additionally, the RISC-V specification allows implementers to create

their own custom extensions.  These custom extensions aren't required

to go through any review or ratification process by the RISC-V

Foundation.  To avoid the maintenance complexity and potential

performance impact of adding kernel code for implementor-specific

RISC-V extensions, we'll only to accept patches for extensions that

have been officially frozen or ratified by the RISC-V Foundation.

(Implementors, may, of course, maintain their own Linux kernel trees

containing code for any custom extensions that they wish.)
 
RISC-V extensions, we'll only consider patches for extensions that either:



- Have been officially frozen or ratified by the RISC-V Foundation, or

- Have been implemented in hardware that is widely available, per standard

  Linux practice.



(Implementers, may, of course, maintain their own Linux kernel trees containing

code for any custom extensions that they wish.)

arch/riscv/Kconfig

+13 −6
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ config RISCV 
	select ARCH_HAS_GIGANTIC_PAGE

	select ARCH_HAS_KCOV

	select ARCH_HAS_MMIOWB

	select ARCH_HAS_PMEM_API

	select ARCH_HAS_PTE_SPECIAL

	select ARCH_HAS_SET_DIRECT_MAP if MMU

	select ARCH_HAS_SET_MEMORY if MMU
@@ -72,6 +73,8 @@ config RISCV 
	select GENERIC_VDSO_TIME_NS if HAVE_GENERIC_VDSO

	select HARDIRQS_SW_RESEND

	select HAVE_ARCH_AUDITSYSCALL

	select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP

	select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT && !XIP_KERNEL

	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL

	select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL

	select HAVE_ARCH_KASAN if MMU && 64BIT
@@ -99,6 +102,7 @@ config RISCV 
	select HAVE_KPROBES if !XIP_KERNEL

	select HAVE_KPROBES_ON_FTRACE if !XIP_KERNEL

	select HAVE_KRETPROBES if !XIP_KERNEL

	select HAVE_RETHOOK if !XIP_KERNEL

	select HAVE_MOVE_PMD

	select HAVE_MOVE_PUD

	select HAVE_PCI
@@ -123,12 +127,18 @@ config RISCV 
	select PCI_MSI if PCI

	select RISCV_INTC

	select RISCV_TIMER if RISCV_SBI

	select SIFIVE_PLIC

	select SPARSE_IRQ

	select SYSCTL_EXCEPTION_TRACE

	select THREAD_INFO_IN_TASK

	select TRACE_IRQFLAGS_SUPPORT

	select UACCESS_MEMCPY if !MMU

	select ZONE_DMA32 if 64BIT

	select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && MMU && $(cc-option,-fpatchable-function-entry=8)

	select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE

	select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL

	select HAVE_FUNCTION_GRAPH_TRACER

	select HAVE_FUNCTION_TRACER if !XIP_KERNEL



config ARCH_MMAP_RND_BITS_MIN

	default 18 if 64BIT
@@ -274,11 +284,6 @@ config ARCH_RV64I 
	bool "RV64I"

	select 64BIT

	select ARCH_SUPPORTS_INT128 if CC_HAS_INT128

	select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && MMU && $(cc-option,-fpatchable-function-entry=8)

	select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE

	select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL

	select HAVE_FUNCTION_GRAPH_TRACER

	select HAVE_FUNCTION_TRACER if !XIP_KERNEL

	select SWIOTLB if MMU



endchoice
@@ -502,7 +507,7 @@ config KEXEC_FILE 
	select KEXEC_CORE

	select KEXEC_ELF

	select HAVE_IMA_KEXEC if IMA

	depends on 64BIT

	depends on 64BIT && MMU

	help

	  This is new version of kexec system call. This system call is

	  file based and takes file descriptors as system call argument
@@ -691,6 +696,8 @@ menu "CPU Power Management" 


source "drivers/cpuidle/Kconfig"



source "drivers/cpufreq/Kconfig"



endmenu # "CPU Power Management"



source "arch/riscv/kvm/Kconfig"

arch/riscv/Kconfig.erratas

+13 −0
Original line number Diff line number Diff line
@@ -66,4 +66,17 @@ config ERRATA_THEAD_CMO 


	  If you don't know what to do here, say "Y".



config ERRATA_THEAD_PMU

	bool "Apply T-Head PMU errata"

	depends on ERRATA_THEAD && RISCV_PMU_SBI

	default y

	help

	  The T-Head C9xx cores implement a PMU overflow extension very

	  similar to the core SSCOFPMF extension.



	  This will apply the overflow errata to handle the non-standard

	  behaviour via the regular SBI PMU driver and interface.



	  If you don't know what to do here, say "Y".



endmenu # "CPU errata selection"