Commit eb5a33ea authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
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powerpc: Don't hide eh field of lwarx behind a macro 



The eh field must remain 0 for PPC32 and is only used
by PPC64.

Don't hide that behind a macro, just leave the responsibility
to the user.

At the time being, the only users of PPC_RAW_L{WDQ}ARX are
setting the eh field to 0, so the special handling of __PPC_EH
is useless. Just take the value given by the caller.

Same for DEFINE_TESTOP(), don't do special handling in that
macro, ensure the caller hands over the proper eh value.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
[mpe: Use 'n' constraint per Segher]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/8b9c8a1a14f9143552a85fcbf96698224a8c2469.1659430931.git.christophe.leroy@csgroup.eu
parent 18db466a

arch/powerpc/include/asm/bitops.h

+2 −2
Original line number Diff line number Diff line
@@ -163,7 +163,7 @@ static inline unsigned long fn( \ 
	"bne- 1b\n"					\

	postfix						\

	: "=&r" (old), "=&r" (t)			\

	: "rK" (mask), "r" (p), "i" (IS_ENABLED(CONFIG_PPC64) ? eh : 0)	\

	: "rK" (mask), "r" (p), "n" (eh)		\

	: "cc", "memory");				\

	return (old & mask);				\

}
@@ -171,7 +171,7 @@ static inline unsigned long fn( \ 
DEFINE_TESTOP(test_and_set_bits, or, PPC_ATOMIC_ENTRY_BARRIER,

	      PPC_ATOMIC_EXIT_BARRIER, 0)

DEFINE_TESTOP(test_and_set_bits_lock, or, "",

	      PPC_ACQUIRE_BARRIER, 1)

	      PPC_ACQUIRE_BARRIER, IS_ENABLED(CONFIG_PPC64))

DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER,

	      PPC_ATOMIC_EXIT_BARRIER, 0)

arch/powerpc/include/asm/ppc-opcode.h

+1 −10
Original line number Diff line number Diff line
@@ -343,6 +343,7 @@ 
#define __PPC_SPR(r)	((((r) & 0x1f) << 16) | ((((r) >> 5) & 0x1f) << 11))

#define __PPC_RC21	(0x1 << 10)

#define __PPC_PRFX_R(r)	(((r) & 0x1) << 20)

#define __PPC_EH(eh)	(((eh) & 0x1) << 0)



/*

 * Both low and high 16 bits are added as SIGNED additions, so if low 16 bits
@@ -359,16 +360,6 @@ 
#define PPC_LI_MASK	0x03fffffc

#define PPC_LI(v)	((v) & PPC_LI_MASK)



/*

 * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a

 * larx with EH set as an illegal instruction.

 */

#ifdef CONFIG_PPC64

#define __PPC_EH(eh)	(((eh) & 0x1) << 0)

#else

#define __PPC_EH(eh)	0

#endif



/* Base instruction encoding */

#define PPC_RAW_CP_ABORT		(0x7c00068c)

#define PPC_RAW_COPY(a, b)		(PPC_INST_COPY | ___PPC_RA(a) | ___PPC_RB(b))