Commit eb467aaa authored by Kan Liang's avatar Kan Liang Committed by Ingo Molnar
Browse files

perf/x86/intel: Support Architectural PerfMon Extension leaf 



The new CPUID leaf 0x23 reports the "true view" of PMU resources.

The sub-leaf 1 reports the available general-purpose counters and fixed
counters. Update the number of counters and fixed counters when the
sub-leaf is detected.

Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Acked-by: default avatarPeter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20230104201349.1451191-5-kan.liang@linux.intel.com
parent a018d2e3

arch/x86/events/intel/core.c

+22 −0
Original line number Diff line number Diff line
@@ -4588,6 +4588,25 @@ static void flip_smm_bit(void *data) 
	}

}



static void intel_pmu_check_num_counters(int *num_counters,

					 int *num_counters_fixed,

					 u64 *intel_ctrl, u64 fixed_mask);



static void update_pmu_cap(struct x86_hybrid_pmu *pmu)

{

	unsigned int sub_bitmaps = cpuid_eax(ARCH_PERFMON_EXT_LEAF);

	unsigned int eax, ebx, ecx, edx;



	if (sub_bitmaps & ARCH_PERFMON_NUM_COUNTER_LEAF_BIT) {

		cpuid_count(ARCH_PERFMON_EXT_LEAF, ARCH_PERFMON_NUM_COUNTER_LEAF,

			    &eax, &ebx, &ecx, &edx);

		pmu->num_counters = fls(eax);

		pmu->num_counters_fixed = fls(ebx);

		intel_pmu_check_num_counters(&pmu->num_counters, &pmu->num_counters_fixed,

					     &pmu->intel_ctrl, ebx);

	}

}



static bool init_hybrid_pmu(int cpu)

{

	struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
@@ -4613,6 +4632,9 @@ static bool init_hybrid_pmu(int cpu) 
	if (!cpumask_empty(&pmu->supported_cpus))

		goto end;



	if (this_cpu_has(X86_FEATURE_ARCH_PERFMON_EXT))

		update_pmu_cap(pmu);



	if (!check_hw_exists(&pmu->pmu, pmu->num_counters, pmu->num_counters_fixed))

		return false;

arch/x86/include/asm/perf_event.h

+8 −0
Original line number Diff line number Diff line
@@ -159,6 +159,14 @@ union cpuid10_edx { 
	unsigned int full;

};



/*

 * Intel "Architectural Performance Monitoring extension" CPUID

 * detection/enumeration details:

 */

#define ARCH_PERFMON_EXT_LEAF			0x00000023

#define ARCH_PERFMON_NUM_COUNTER_LEAF_BIT	0x1

#define ARCH_PERFMON_NUM_COUNTER_LEAF		0x1



/*

 * Intel Architectural LBR CPUID detection/enumeration details:

 */