Commit eb2d8ec3 authored by Mark Brown's avatar Mark Brown
Browse files

Merge remote-tracking branches 'asoc/topic/fsl', 'asoc/topic/fsl-sai',... 

Merge remote-tracking branches 'asoc/topic/fsl', 'asoc/topic/fsl-sai', 'asoc/topic/fsl-spdif', 'asoc/topic/fsl-ssi' and 'asoc/topic/gpio-jack' into asoc-next
parents 698803f8 0f9a7fec c5f4823b f490f326 ff9174d5 e616d2eb

include/dt-bindings/sound/audio-jack-events.h

0 → 100644
+9 −0
Original line number Diff line number Diff line 
#ifndef __AUDIO_JACK_EVENTS_H

#define __AUDIO_JACK_EVENTS_H



#define JACK_HEADPHONE		1

#define JACK_MICROPHONE		2

#define JACK_LINEOUT		3

#define JACK_LINEIN		4



#endif /* __AUDIO_JACK_EVENTS_H */

sound/soc/fsl/fsl_dma.c

+2 −2
Original line number Diff line number Diff line
@@ -445,7 +445,7 @@ static int fsl_dma_open(struct snd_pcm_substream *substream) 
		return ret;

	}



	dma->assigned = 1;

	dma->assigned = true;



	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);

	snd_soc_set_runtime_hwparams(substream, &fsl_dma_hardware);
@@ -814,7 +814,7 @@ static int fsl_dma_close(struct snd_pcm_substream *substream) 
		substream->runtime->private_data = NULL;

	}



	dma->assigned = 0;

	dma->assigned = false;



	return 0;

}

sound/soc/fsl/fsl_sai.c

+135 −6
Original line number Diff line number Diff line 
/*

 * Freescale ALSA SoC Digital Audio Interface (SAI) driver.

 *

 * Copyright 2012-2013 Freescale Semiconductor, Inc.

 * Copyright 2012-2015 Freescale Semiconductor, Inc.

 *

 * This program is free software, you can redistribute it and/or modify it

 * under the terms of the GNU General Public License as published by the
@@ -27,6 +27,17 @@ 
#define FSL_SAI_FLAGS (FSL_SAI_CSR_SEIE |\

		       FSL_SAI_CSR_FEIE)



static u32 fsl_sai_rates[] = {

	8000, 11025, 12000, 16000, 22050,

	24000, 32000, 44100, 48000, 64000,

	88200, 96000, 176400, 192000

};



static struct snd_pcm_hw_constraint_list fsl_sai_rate_constraints = {

	.count = ARRAY_SIZE(fsl_sai_rates),

	.list = fsl_sai_rates,

};



static irqreturn_t fsl_sai_isr(int irq, void *devid)

{

	struct fsl_sai *sai = (struct fsl_sai *)devid;
@@ -251,12 +262,14 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai, 
		val_cr4 |= FSL_SAI_CR4_FSD_MSTR;

		break;

	case SND_SOC_DAIFMT_CBM_CFM:

		sai->is_slave_mode = true;

		break;

	case SND_SOC_DAIFMT_CBS_CFM:

		val_cr2 |= FSL_SAI_CR2_BCD_MSTR;

		break;

	case SND_SOC_DAIFMT_CBM_CFS:

		val_cr4 |= FSL_SAI_CR4_FSD_MSTR;

		sai->is_slave_mode = true;

		break;

	default:

		return -EINVAL;
@@ -288,6 +301,79 @@ static int fsl_sai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) 
	return ret;

}



static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)

{

	struct fsl_sai *sai = snd_soc_dai_get_drvdata(dai);

	unsigned long clk_rate;

	u32 savediv = 0, ratio, savesub = freq;

	u32 id;

	int ret = 0;



	/* Don't apply to slave mode */

	if (sai->is_slave_mode)

		return 0;



	for (id = 0; id < FSL_SAI_MCLK_MAX; id++) {

		clk_rate = clk_get_rate(sai->mclk_clk[id]);

		if (!clk_rate)

			continue;



		ratio = clk_rate / freq;



		ret = clk_rate - ratio * freq;



		/*

		 * Drop the source that can not be

		 * divided into the required rate.

		 */

		if (ret != 0 && clk_rate / ret < 1000)

			continue;



		dev_dbg(dai->dev,

			"ratio %d for freq %dHz based on clock %ldHz\n",

			ratio, freq, clk_rate);



		if (ratio % 2 == 0 && ratio >= 2 && ratio <= 512)

			ratio /= 2;

		else

			continue;



		if (ret < savesub) {

			savediv = ratio;

			sai->mclk_id[tx] = id;

			savesub = ret;

		}



		if (ret == 0)

			break;

	}



	if (savediv == 0) {

		dev_err(dai->dev, "failed to derive required %cx rate: %d\n",

				tx ? 'T' : 'R', freq);

		return -EINVAL;

	}



	if ((tx && sai->synchronous[TX]) || (!tx && !sai->synchronous[RX])) {

		regmap_update_bits(sai->regmap, FSL_SAI_RCR2,

				   FSL_SAI_CR2_MSEL_MASK,

				   FSL_SAI_CR2_MSEL(sai->mclk_id[tx]));

		regmap_update_bits(sai->regmap, FSL_SAI_RCR2,

				   FSL_SAI_CR2_DIV_MASK, savediv - 1);

	} else {

		regmap_update_bits(sai->regmap, FSL_SAI_TCR2,

				   FSL_SAI_CR2_MSEL_MASK,

				   FSL_SAI_CR2_MSEL(sai->mclk_id[tx]));

		regmap_update_bits(sai->regmap, FSL_SAI_TCR2,

				   FSL_SAI_CR2_DIV_MASK, savediv - 1);

	}



	dev_dbg(dai->dev, "best fit: clock id=%d, div=%d, deviation =%d\n",

			sai->mclk_id[tx], savediv, savesub);



	return 0;

}



static int fsl_sai_hw_params(struct snd_pcm_substream *substream,

		struct snd_pcm_hw_params *params,

		struct snd_soc_dai *cpu_dai)
@@ -297,6 +383,24 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, 
	unsigned int channels = params_channels(params);

	u32 word_width = snd_pcm_format_width(params_format(params));

	u32 val_cr4 = 0, val_cr5 = 0;

	int ret;



	if (!sai->is_slave_mode) {

		ret = fsl_sai_set_bclk(cpu_dai, tx,

			2 * word_width * params_rate(params));

		if (ret)

			return ret;



		/* Do not enable the clock if it is already enabled */

		if (!(sai->mclk_streams & BIT(substream->stream))) {

			ret = clk_prepare_enable(sai->mclk_clk[sai->mclk_id[tx]]);

			if (ret)

				return ret;



			sai->mclk_streams |= BIT(substream->stream);

		}



	}



	if (!sai->is_dsp_mode)

		val_cr4 |= FSL_SAI_CR4_SYWD(word_width);
@@ -322,6 +426,22 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, 
	return 0;

}



static int fsl_sai_hw_free(struct snd_pcm_substream *substream,

		struct snd_soc_dai *cpu_dai)

{

	struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);

	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;



	if (!sai->is_slave_mode &&

			sai->mclk_streams & BIT(substream->stream)) {

		clk_disable_unprepare(sai->mclk_clk[sai->mclk_id[tx]]);

		sai->mclk_streams &= ~BIT(substream->stream);

	}



	return 0;

}





static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,

		struct snd_soc_dai *cpu_dai)

{
@@ -410,7 +530,10 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream, 
	regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE,

			   FSL_SAI_CR3_TRCE);



	return 0;

	ret = snd_pcm_hw_constraint_list(substream->runtime, 0,

			SNDRV_PCM_HW_PARAM_RATE, &fsl_sai_rate_constraints);



	return ret;

}



static void fsl_sai_shutdown(struct snd_pcm_substream *substream,
@@ -428,6 +551,7 @@ static const struct snd_soc_dai_ops fsl_sai_pcm_dai_ops = { 
	.set_sysclk	= fsl_sai_set_dai_sysclk,

	.set_fmt	= fsl_sai_set_dai_fmt,

	.hw_params	= fsl_sai_hw_params,

	.hw_free	= fsl_sai_hw_free,

	.trigger	= fsl_sai_trigger,

	.startup	= fsl_sai_startup,

	.shutdown	= fsl_sai_shutdown,
@@ -463,14 +587,18 @@ static struct snd_soc_dai_driver fsl_sai_dai = { 
		.stream_name = "CPU-Playback",

		.channels_min = 1,

		.channels_max = 2,

		.rates = SNDRV_PCM_RATE_8000_96000,

		.rate_min = 8000,

		.rate_max = 192000,

		.rates = SNDRV_PCM_RATE_KNOT,

		.formats = FSL_SAI_FORMATS,

	},

	.capture = {

		.stream_name = "CPU-Capture",

		.channels_min = 1,

		.channels_max = 2,

		.rates = SNDRV_PCM_RATE_8000_96000,

		.rate_min = 8000,

		.rate_max = 192000,

		.rates = SNDRV_PCM_RATE_KNOT,

		.formats = FSL_SAI_FORMATS,

	},

	.ops = &fsl_sai_pcm_dai_ops,
@@ -600,8 +728,9 @@ static int fsl_sai_probe(struct platform_device *pdev) 
		sai->bus_clk = NULL;

	}



	for (i = 0; i < FSL_SAI_MCLK_MAX; i++) {

		sprintf(tmp, "mclk%d", i + 1);

	sai->mclk_clk[0] = sai->bus_clk;

	for (i = 1; i < FSL_SAI_MCLK_MAX; i++) {

		sprintf(tmp, "mclk%d", i);

		sai->mclk_clk[i] = devm_clk_get(&pdev->dev, tmp);

		if (IS_ERR(sai->mclk_clk[i])) {

			dev_err(&pdev->dev, "failed to get mclk%d clock: %ld\n",

sound/soc/fsl/fsl_sai.h

+7 −2
Original line number Diff line number Diff line
@@ -72,13 +72,15 @@ 


/* SAI Transmit and Recieve Configuration 2 Register */

#define FSL_SAI_CR2_SYNC	BIT(30)

#define FSL_SAI_CR2_MSEL_MASK	(0xff << 26)

#define FSL_SAI_CR2_MSEL_MASK	(0x3 << 26)

#define FSL_SAI_CR2_MSEL_BUS	0

#define FSL_SAI_CR2_MSEL_MCLK1	BIT(26)

#define FSL_SAI_CR2_MSEL_MCLK2	BIT(27)

#define FSL_SAI_CR2_MSEL_MCLK3	(BIT(26) | BIT(27))

#define FSL_SAI_CR2_MSEL(ID)	((ID) << 26)

#define FSL_SAI_CR2_BCP		BIT(25)

#define FSL_SAI_CR2_BCD_MSTR	BIT(24)

#define FSL_SAI_CR2_DIV_MASK	0xff



/* SAI Transmit and Recieve Configuration 3 Register */

#define FSL_SAI_CR3_TRCE	BIT(16)
@@ -120,7 +122,7 @@ 
#define FSL_SAI_CLK_MAST2	2

#define FSL_SAI_CLK_MAST3	3



#define FSL_SAI_MCLK_MAX	3

#define FSL_SAI_MCLK_MAX	4



/* SAI data transfer numbers per DMA request */

#define FSL_SAI_MAXBURST_TX 6
@@ -132,11 +134,14 @@ struct fsl_sai { 
	struct clk *bus_clk;

	struct clk *mclk_clk[FSL_SAI_MCLK_MAX];



	bool is_slave_mode;

	bool is_lsb_first;

	bool is_dsp_mode;

	bool sai_on_imx;

	bool synchronous[2];



	unsigned int mclk_id[2];

	unsigned int mclk_streams;

	struct snd_dmaengine_dai_dma_data dma_params_rx;

	struct snd_dmaengine_dai_dma_data dma_params_tx;

};

sound/soc/fsl/fsl_spdif.c

+4 −6
Original line number Diff line number Diff line
@@ -417,11 +417,9 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream, 
	if (clk != STC_TXCLK_SPDIF_ROOT)

		goto clk_set_bypass;



	/*

	 * The S/PDIF block needs a clock of 64 * fs * txclk_df.

	 * So request 64 * fs * (txclk_df + 1) to get rounded.

	 */

	ret = clk_set_rate(spdif_priv->txclk[rate], 64 * sample_rate * (txclk_df + 1));

	/* The S/PDIF block needs a clock of 64 * fs * txclk_df */

	ret = clk_set_rate(spdif_priv->txclk[rate],

			   64 * sample_rate * txclk_df);

	if (ret) {

		dev_err(&pdev->dev, "failed to set tx clock rate\n");

		return ret;
@@ -1060,7 +1058,7 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv, 


	for (sysclk_df = sysclk_dfmin; sysclk_df <= sysclk_dfmax; sysclk_df++) {

		for (txclk_df = 1; txclk_df <= 128; txclk_df++) {

			rate_ideal = rate[index] * (txclk_df + 1) * 64;

			rate_ideal = rate[index] * txclk_df * 64;

			if (round)

				rate_actual = clk_round_rate(clk, rate_ideal);

			else