Commit eaee5d9f authored by Igor Vavro's avatar Igor Vavro Committed by Linus Walleij
Browse files

pinctrl: meson: add tsin pinctrl for meson gxbb/gxl/gxm 

Add the tsin pinctrl definitions needed for integrated DVB hardware
support on Meson GXBB/GXL/GXM boards.

changes in v2
- fix ordering and numbering of uart_c ping flagged by Otto in [1]

[1] http://lists.infradead.org/pipermail/linux-amlogic/2020-March/015906.html



Signed-off-by: default avatarIgor Vavro <afl2001@gmail.com>
[updated commit message]
Signed-off-by: default avatarChristian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/1583377666-13378-1-git-send-email-christianshewitt@gmail.com


Reviewed-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 9eb81d69

drivers/pinctrl/meson/pinctrl-meson-gxbb.c

+35 −0
Original line number Original line Diff line number Diff line
@@ -231,10 +231,24 @@ static const unsigned int hdmi_hpd_pins[] = { GPIOH_0 }; 
static const unsigned int hdmi_sda_pins[]	= { GPIOH_1 };

static const unsigned int hdmi_sda_pins[]	= { GPIOH_1 };

static const unsigned int hdmi_scl_pins[]	= { GPIOH_2 };

static const unsigned int hdmi_scl_pins[]	= { GPIOH_2 };





static const unsigned int tsin_a_d_valid_pins[] = { GPIOY_0 };

static const unsigned int tsin_a_sop_pins[]	= { GPIOY_1 };

static const unsigned int tsin_a_clk_pins[]	= { GPIOY_2 };

static const unsigned int tsin_a_d0_pins[]	= { GPIOY_3 };

static const unsigned int tsin_a_dp_pins[]	= {

	GPIOY_4, GPIOY_5, GPIOY_6, GPIOY_7, GPIOY_8, GPIOY_9, GPIOY_10

};



static const unsigned int tsin_a_fail_pins[]	= { GPIOY_11 };

static const unsigned int i2s_out_ch23_y_pins[]	= { GPIOY_8 };

static const unsigned int i2s_out_ch23_y_pins[]	= { GPIOY_8 };

static const unsigned int i2s_out_ch45_y_pins[]	= { GPIOY_9 };

static const unsigned int i2s_out_ch45_y_pins[]	= { GPIOY_9 };

static const unsigned int i2s_out_ch67_y_pins[]	= { GPIOY_10 };

static const unsigned int i2s_out_ch67_y_pins[]	= { GPIOY_10 };





static const unsigned int tsin_b_d_valid_pins[] = { GPIOX_6 };

static const unsigned int tsin_b_sop_pins[]	= { GPIOX_7 };

static const unsigned int tsin_b_clk_pins[]	= { GPIOX_8 };

static const unsigned int tsin_b_d0_pins[]	= { GPIOX_9 };



static const unsigned int spdif_out_y_pins[]	= { GPIOY_12 };

static const unsigned int spdif_out_y_pins[]	= { GPIOY_12 };





static const unsigned int gen_clk_out_pins[]	= { GPIOY_15 };

static const unsigned int gen_clk_out_pins[]	= { GPIOY_15 };
@@ -437,12 +451,22 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = { 
	GROUP(pwm_a_x,		3,	17),

	GROUP(pwm_a_x,		3,	17),

	GROUP(pwm_e,		2,	30),

	GROUP(pwm_e,		2,	30),

	GROUP(pwm_f_x,		3,	18),

	GROUP(pwm_f_x,		3,	18),

	GROUP(tsin_b_d_valid,	3,	9),

	GROUP(tsin_b_sop,	3,	8),

	GROUP(tsin_b_clk,	3,	10),

	GROUP(tsin_b_d0,	3,	7),





	/* Bank Y */

	/* Bank Y */

	GROUP(uart_cts_c,	1,	17),

	GROUP(uart_cts_c,	1,	17),

	GROUP(uart_rts_c,	1,	16),

	GROUP(uart_rts_c,	1,	16),

	GROUP(uart_tx_c,	1,	19),

	GROUP(uart_tx_c,	1,	19),

	GROUP(uart_rx_c,	1,	18),

	GROUP(uart_rx_c,	1,	18),

	GROUP(tsin_a_fail,	3,	3),

	GROUP(tsin_a_d_valid,	3,	2),

	GROUP(tsin_a_sop,	3,	1),

	GROUP(tsin_a_clk,	3,	0),

	GROUP(tsin_a_d0,	3,	4),

	GROUP(tsin_a_dp,	3,	5),

	GROUP(pwm_a_y,		1,	21),

	GROUP(pwm_a_y,		1,	21),

	GROUP(pwm_f_y,		1,	20),

	GROUP(pwm_f_y,		1,	20),

	GROUP(i2s_out_ch23_y,	1,	5),

	GROUP(i2s_out_ch23_y,	1,	5),
@@ -601,6 +625,15 @@ static const char * const gpio_periphs_groups[] = { 
	"GPIOX_20", "GPIOX_21", "GPIOX_22",

	"GPIOX_20", "GPIOX_21", "GPIOX_22",

};

};





static const char * const tsin_a_groups[] = {

	"tsin_a_clk", "tsin_a_sop", "tsin_a_d_valid", "tsin_a_d0",

	"tsin_a_dp", "tsin_a_fail",

};



static const char * const tsin_b_groups[] = {

	"tsin_b_clk", "tsin_b_sop", "tsin_b_d_valid", "tsin_b_d0",

};



static const char * const emmc_groups[] = {

static const char * const emmc_groups[] = {

	"emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds",

	"emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds",

};

};
@@ -792,6 +825,8 @@ static struct meson_pmx_func meson_gxbb_periphs_functions[] = { 
	FUNCTION(i2s_out),

	FUNCTION(i2s_out),

	FUNCTION(spdif_out),

	FUNCTION(spdif_out),

	FUNCTION(gen_clk_out),

	FUNCTION(gen_clk_out),

	FUNCTION(tsin_a),

	FUNCTION(tsin_b),

};

};





static struct meson_pmx_func meson_gxbb_aobus_functions[] = {

static struct meson_pmx_func meson_gxbb_aobus_functions[] = {

drivers/pinctrl/meson/pinctrl-meson-gxl.c

+27 −0
Original line number Original line Diff line number Diff line
@@ -241,6 +241,17 @@ static const unsigned int tsin_a_dp_pins[] = { 
	GPIODV_1, GPIODV_2, GPIODV_3, GPIODV_4, GPIODV_5, GPIODV_6, GPIODV_7,

	GPIODV_1, GPIODV_2, GPIODV_3, GPIODV_4, GPIODV_5, GPIODV_6, GPIODV_7,

};

};





static const unsigned int tsin_b_clk_pins[]	= { GPIOH_6 };

static const unsigned int tsin_b_d0_pins[]	= { GPIOH_7 };

static const unsigned int tsin_b_sop_pins[]	= { GPIOH_8 };

static const unsigned int tsin_b_d_valid_pins[] = { GPIOH_9 };



static const unsigned int tsin_b_fail_z4_pins[] = { GPIOZ_4 };

static const unsigned int tsin_b_clk_z3_pins[]	= { GPIOZ_3 };

static const unsigned int tsin_b_d0_z2_pins[]	= { GPIOZ_2 };

static const unsigned int tsin_b_sop_z1_pins[]	= { GPIOZ_1 };

static const unsigned int tsin_b_d_valid_z0_pins[] = { GPIOZ_0 };



static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = {

static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = {

	MESON_PIN(GPIOAO_0),

	MESON_PIN(GPIOAO_0),

	MESON_PIN(GPIOAO_1),

	MESON_PIN(GPIOAO_1),
@@ -438,6 +449,11 @@ static struct meson_pmx_group meson_gxl_periphs_groups[] = { 
	GROUP(eth_txd1,		4,	12),

	GROUP(eth_txd1,		4,	12),

	GROUP(eth_txd2,		4,	11),

	GROUP(eth_txd2,		4,	11),

	GROUP(eth_txd3,		4,	10),

	GROUP(eth_txd3,		4,	10),

	GROUP(tsin_b_fail_z4,	3,	15),

	GROUP(tsin_b_clk_z3,	3,	16),

	GROUP(tsin_b_d0_z2,	3,	17),

	GROUP(tsin_b_sop_z1,	3,	18),

	GROUP(tsin_b_d_valid_z0, 3,	19),

	GROUP(pwm_c,		3,	20),

	GROUP(pwm_c,		3,	20),

	GROUP(i2s_out_ch23_z,	3,	26),

	GROUP(i2s_out_ch23_z,	3,	26),

	GROUP(i2s_out_ch45_z,	3,	25),

	GROUP(i2s_out_ch45_z,	3,	25),
@@ -454,6 +470,10 @@ static struct meson_pmx_group meson_gxl_periphs_groups[] = { 
	GROUP(i2s_out_lr_clk,	6,	24),

	GROUP(i2s_out_lr_clk,	6,	24),

	GROUP(i2s_out_ch01,	6,	23),

	GROUP(i2s_out_ch01,	6,	23),

	GROUP(spdif_out_h,	6,	28),

	GROUP(spdif_out_h,	6,	28),

	GROUP(tsin_b_d0,	6,	17),

	GROUP(tsin_b_sop,	6,	18),

	GROUP(tsin_b_d_valid,	6,	19),

	GROUP(tsin_b_clk,	6,	20),





	/* Bank DV */

	/* Bank DV */

	GROUP(uart_tx_b,	2,	16),

	GROUP(uart_tx_b,	2,	16),
@@ -689,6 +709,12 @@ static const char * const tsin_a_groups[] = { 
	"tsin_a_dp", "tsin_a_fail",

	"tsin_a_dp", "tsin_a_fail",

};

};





static const char * const tsin_b_groups[] = {

	"tsin_b_clk", "tsin_b_sop", "tsin_b_d_valid", "tsin_b_d0",

	"tsin_b_clk_z3", "tsin_b_sop_z1", "tsin_b_d_valid_z0", "tsin_b_d0_z2",

	"tsin_b_fail_z4",

};



static const char * const gpio_aobus_groups[] = {

static const char * const gpio_aobus_groups[] = {

	"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",

	"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",

	"GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",

	"GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
@@ -764,6 +790,7 @@ static struct meson_pmx_func meson_gxl_periphs_functions[] = { 
	FUNCTION(spdif_out),

	FUNCTION(spdif_out),

	FUNCTION(eth_led),

	FUNCTION(eth_led),

	FUNCTION(tsin_a),

	FUNCTION(tsin_a),

	FUNCTION(tsin_b),

};

};





static struct meson_pmx_func meson_gxl_aobus_functions[] = {

static struct meson_pmx_func meson_gxl_aobus_functions[] = {