Loading drivers/net/sky2.c +22 −5 Original line number Diff line number Diff line Loading @@ -2478,17 +2478,34 @@ static const struct sky2_stat { { "rx_unicast", GM_RXF_UC_OK }, { "tx_mac_pause", GM_TXF_MPAUSE }, { "rx_mac_pause", GM_RXF_MPAUSE }, { "collisions", GM_TXF_SNG_COL }, { "collisions", GM_TXF_COL }, { "late_collision",GM_TXF_LAT_COL }, { "aborted", GM_TXF_ABO_COL }, { "single_collisions", GM_TXF_SNG_COL }, { "multi_collisions", GM_TXF_MUL_COL }, { "fifo_underrun", GM_TXE_FIFO_UR }, { "fifo_overflow", GM_RXE_FIFO_OV }, { "rx_toolong", GM_RXF_LNG_ERR }, { "rx_jabber", GM_RXF_JAB_PKT }, { "rx_short", GM_RXE_SHT }, { "rx_runt", GM_RXE_FRAG }, { "rx_64_byte_packets", GM_RXF_64B }, { "rx_65_to_127_byte_packets", GM_RXF_127B }, { "rx_128_to_255_byte_packets", GM_RXF_255B }, { "rx_256_to_511_byte_packets", GM_RXF_511B }, { "rx_512_to_1023_byte_packets", GM_RXF_1023B }, { "rx_1024_to_1518_byte_packets", GM_RXF_1518B }, { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ }, { "rx_too_long", GM_RXF_LNG_ERR }, { "rx_fifo_overflow", GM_RXE_FIFO_OV }, { "rx_jabber", GM_RXF_JAB_PKT }, { "rx_fcs_error", GM_RXF_FCS_ERR }, { "tx_64_byte_packets", GM_TXF_64B }, { "tx_65_to_127_byte_packets", GM_TXF_127B }, { "tx_128_to_255_byte_packets", GM_TXF_255B }, { "tx_256_to_511_byte_packets", GM_TXF_511B }, { "tx_512_to_1023_byte_packets", GM_TXF_1023B }, { "tx_1024_to_1518_byte_packets", GM_TXF_1518B }, { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ }, { "tx_fifo_underrun", GM_TXE_FIFO_UR }, }; static u32 sky2_get_rx_csum(struct net_device *dev) Loading drivers/net/sky2.h +35 −36 Original line number Diff line number Diff line Loading @@ -1373,11 +1373,11 @@ enum { GM_SMI_CTRL = 0x0080, /* 16 bit r/w SMI Control Register */ GM_SMI_DATA = 0x0084, /* 16 bit r/w SMI Data Register */ GM_PHY_ADDR = 0x0088, /* 16 bit r/w GPHY Address Register */ /* MIB Counters */ GM_MIB_CNT_BASE = 0x0100, /* Base Address of MIB Counters */ GM_MIB_CNT_SIZE = 256, }; /* MIB Counters */ #define GM_MIB_CNT_BASE 0x0100 /* Base Address of MIB Counters */ #define GM_MIB_CNT_SIZE 44 /* Number of MIB Counters */ /* * MIB Counters base address definitions (low word) - Loading @@ -1389,7 +1389,7 @@ enum { GM_RXF_MPAUSE = GM_MIB_CNT_BASE + 16, /* Pause MAC Ctrl Frames Received */ GM_RXF_MC_OK = GM_MIB_CNT_BASE + 24, /* Multicast Frames Received OK */ GM_RXF_FCS_ERR = GM_MIB_CNT_BASE + 32, /* Rx Frame Check Seq. Error */ /* GM_MIB_CNT_BASE + 40: reserved */ GM_RXO_OK_LO = GM_MIB_CNT_BASE + 48, /* Octets Received OK Low */ GM_RXO_OK_HI = GM_MIB_CNT_BASE + 56, /* Octets Received OK High */ GM_RXO_ERR_LO = GM_MIB_CNT_BASE + 64, /* Octets Received Invalid Low */ Loading @@ -1405,9 +1405,8 @@ enum { GM_RXF_MAX_SZ = GM_MIB_CNT_BASE + 144,/* 1519-MaxSize Byte Rx Frame */ GM_RXF_LNG_ERR = GM_MIB_CNT_BASE + 152,/* Rx Frame too Long Error */ GM_RXF_JAB_PKT = GM_MIB_CNT_BASE + 160,/* Rx Jabber Packet Frame */ /* GM_MIB_CNT_BASE + 168: reserved */ GM_RXE_FIFO_OV = GM_MIB_CNT_BASE + 176,/* Rx FIFO overflow Event */ /* GM_MIB_CNT_BASE + 184: reserved */ GM_TXF_UC_OK = GM_MIB_CNT_BASE + 192,/* Unicast Frames Xmitted OK */ GM_TXF_BC_OK = GM_MIB_CNT_BASE + 200,/* Broadcast Frames Xmitted OK */ GM_TXF_MPAUSE = GM_MIB_CNT_BASE + 208,/* Pause MAC Ctrl Frames Xmitted */ Loading Loading
drivers/net/sky2.c +22 −5 Original line number Diff line number Diff line Loading @@ -2478,17 +2478,34 @@ static const struct sky2_stat { { "rx_unicast", GM_RXF_UC_OK }, { "tx_mac_pause", GM_TXF_MPAUSE }, { "rx_mac_pause", GM_RXF_MPAUSE }, { "collisions", GM_TXF_SNG_COL }, { "collisions", GM_TXF_COL }, { "late_collision",GM_TXF_LAT_COL }, { "aborted", GM_TXF_ABO_COL }, { "single_collisions", GM_TXF_SNG_COL }, { "multi_collisions", GM_TXF_MUL_COL }, { "fifo_underrun", GM_TXE_FIFO_UR }, { "fifo_overflow", GM_RXE_FIFO_OV }, { "rx_toolong", GM_RXF_LNG_ERR }, { "rx_jabber", GM_RXF_JAB_PKT }, { "rx_short", GM_RXE_SHT }, { "rx_runt", GM_RXE_FRAG }, { "rx_64_byte_packets", GM_RXF_64B }, { "rx_65_to_127_byte_packets", GM_RXF_127B }, { "rx_128_to_255_byte_packets", GM_RXF_255B }, { "rx_256_to_511_byte_packets", GM_RXF_511B }, { "rx_512_to_1023_byte_packets", GM_RXF_1023B }, { "rx_1024_to_1518_byte_packets", GM_RXF_1518B }, { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ }, { "rx_too_long", GM_RXF_LNG_ERR }, { "rx_fifo_overflow", GM_RXE_FIFO_OV }, { "rx_jabber", GM_RXF_JAB_PKT }, { "rx_fcs_error", GM_RXF_FCS_ERR }, { "tx_64_byte_packets", GM_TXF_64B }, { "tx_65_to_127_byte_packets", GM_TXF_127B }, { "tx_128_to_255_byte_packets", GM_TXF_255B }, { "tx_256_to_511_byte_packets", GM_TXF_511B }, { "tx_512_to_1023_byte_packets", GM_TXF_1023B }, { "tx_1024_to_1518_byte_packets", GM_TXF_1518B }, { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ }, { "tx_fifo_underrun", GM_TXE_FIFO_UR }, }; static u32 sky2_get_rx_csum(struct net_device *dev) Loading
drivers/net/sky2.h +35 −36 Original line number Diff line number Diff line Loading @@ -1373,11 +1373,11 @@ enum { GM_SMI_CTRL = 0x0080, /* 16 bit r/w SMI Control Register */ GM_SMI_DATA = 0x0084, /* 16 bit r/w SMI Data Register */ GM_PHY_ADDR = 0x0088, /* 16 bit r/w GPHY Address Register */ /* MIB Counters */ GM_MIB_CNT_BASE = 0x0100, /* Base Address of MIB Counters */ GM_MIB_CNT_SIZE = 256, }; /* MIB Counters */ #define GM_MIB_CNT_BASE 0x0100 /* Base Address of MIB Counters */ #define GM_MIB_CNT_SIZE 44 /* Number of MIB Counters */ /* * MIB Counters base address definitions (low word) - Loading @@ -1389,7 +1389,7 @@ enum { GM_RXF_MPAUSE = GM_MIB_CNT_BASE + 16, /* Pause MAC Ctrl Frames Received */ GM_RXF_MC_OK = GM_MIB_CNT_BASE + 24, /* Multicast Frames Received OK */ GM_RXF_FCS_ERR = GM_MIB_CNT_BASE + 32, /* Rx Frame Check Seq. Error */ /* GM_MIB_CNT_BASE + 40: reserved */ GM_RXO_OK_LO = GM_MIB_CNT_BASE + 48, /* Octets Received OK Low */ GM_RXO_OK_HI = GM_MIB_CNT_BASE + 56, /* Octets Received OK High */ GM_RXO_ERR_LO = GM_MIB_CNT_BASE + 64, /* Octets Received Invalid Low */ Loading @@ -1405,9 +1405,8 @@ enum { GM_RXF_MAX_SZ = GM_MIB_CNT_BASE + 144,/* 1519-MaxSize Byte Rx Frame */ GM_RXF_LNG_ERR = GM_MIB_CNT_BASE + 152,/* Rx Frame too Long Error */ GM_RXF_JAB_PKT = GM_MIB_CNT_BASE + 160,/* Rx Jabber Packet Frame */ /* GM_MIB_CNT_BASE + 168: reserved */ GM_RXE_FIFO_OV = GM_MIB_CNT_BASE + 176,/* Rx FIFO overflow Event */ /* GM_MIB_CNT_BASE + 184: reserved */ GM_TXF_UC_OK = GM_MIB_CNT_BASE + 192,/* Unicast Frames Xmitted OK */ GM_TXF_BC_OK = GM_MIB_CNT_BASE + 200,/* Broadcast Frames Xmitted OK */ GM_TXF_MPAUSE = GM_MIB_CNT_BASE + 208,/* Pause MAC Ctrl Frames Xmitted */ Loading