Commit eaac4e55 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sdm845: add displayport node



Add displayport controller device node, describing DisplayPort hardware
block on SDM845.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220810035424.2796777-3-bjorn.andersson@linaro.org
parent d6838f26
Loading
Loading
Loading
Loading
+80 −2
Original line number Diff line number Diff line
@@ -4494,13 +4494,20 @@

					port@0 {
						reg = <0>;
						dpu_intf1_out: endpoint {
							remote-endpoint = <&dsi0_in>;
						dpu_intf0_out: endpoint {
							remote-endpoint = <&dp_in>;
						};
					};

					port@1 {
						reg = <1>;
						dpu_intf1_out: endpoint {
							remote-endpoint = <&dsi0_in>;
						};
					};

					port@2 {
						reg = <2>;
						dpu_intf2_out: endpoint {
							remote-endpoint = <&dsi1_in>;
						};
@@ -4532,6 +4539,77 @@
				};
			};

			mdss_dp: displayport-controller@ae90000 {
				status = "disabled";
				compatible = "qcom,sdm845-dp";

				reg = <0 0xae90000 0 0x200>,
				      <0 0xae90200 0 0x200>,
				      <0 0xae90400 0 0x600>,
				      <0 0xae90a00 0 0x600>,
				      <0 0xae91000 0 0x600>;

				interrupt-parent = <&mdss>;
				interrupts = <12>;

				clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
					 <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
					 <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
					 <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
					 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
				clock-names = "core_iface", "core_aux", "ctrl_link",
					      "ctrl_link_iface", "stream_pixel";
				#clock-cells = <1>;
				assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
						  <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
				assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
				phys = <&dp_phy>;
				phy-names = "dp";

				operating-points-v2 = <&dp_opp_table>;
				power-domains = <&rpmhpd SDM845_CX>;

				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						dp_in: endpoint {
							remote-endpoint = <&dpu_intf0_out>;
						};
					};

					port@1 {
						reg = <1>;
						dp_out: endpoint { };
					};
				};

				dp_opp_table: dp-opp-table {
					compatible = "operating-points-v2";

					opp-162000000 {
						opp-hz = /bits/ 64 <162000000>;
						required-opps = <&rpmhpd_opp_low_svs>;
					};

					opp-270000000 {
						opp-hz = /bits/ 64 <270000000>;
						required-opps = <&rpmhpd_opp_svs>;
					};

					opp-540000000 {
						opp-hz = /bits/ 64 <540000000>;
						required-opps = <&rpmhpd_opp_svs_l1>;
					};

					opp-810000000 {
						opp-hz = /bits/ 64 <810000000>;
						required-opps = <&rpmhpd_opp_nom>;
					};
				};
			};

			dsi0: dsi@ae94000 {
				compatible = "qcom,mdss-dsi-ctrl";
				reg = <0 0x0ae94000 0 0x400>;