Commit ea690ad7 authored by Johan Jonker's avatar Johan Jonker Committed by Miquel Raynal
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mtd: rawnand: rockchip: Align hwecc vs. raw page helper layouts 



Currently, read/write_page_hwecc() and read/write_page_raw() are not
aligned: there is a mismatch in the OOB bytes which are not
read/written at the same offset in both cases (raw vs. hwecc).

This is a real problem when relying on the presence of the Page
Addresses (PA) when using the NAND chip as a boot device, as the
BootROM expects additional data in the OOB area at specific locations.

Rockchip boot blocks are written per 4 x 512 byte sectors per page.
Each page with boot blocks must have a page address (PA) pointer in OOB
to the next page. Pages are written in a pattern depending on the NAND chip ID.

Generate boot block page address and pattern for hwecc in user space
and copy PA data to/from the already reserved last 4 bytes before ECC
in the chip->oob_poi data layout.

Align the different helpers. This change breaks existing jffs2 users.

Fixes: 058e0e84 ("mtd: rawnand: rockchip: NFC driver for RK3308, RK2928 and others")
Signed-off-by: default avatarJohan Jonker <jbx6244@gmail.com>
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/5e782c08-862b-51ae-47ff-3299940928ca@gmail.com
parent d0ca3b92

drivers/mtd/nand/raw/rockchip-nand-controller.c

+21 −13
Original line number Diff line number Diff line
@@ -598,7 +598,7 @@ static int rk_nfc_write_page_hwecc(struct nand_chip *chip, const u8 *buf, 
	int pages_per_blk = mtd->erasesize / mtd->writesize;

	int ret = 0, i, boot_rom_mode = 0;

	dma_addr_t dma_data, dma_oob;

	u32 reg;

	u32 tmp;

	u8 *oob;



	nand_prog_page_begin_op(chip, page, 0, NULL, 0);
@@ -625,6 +625,13 @@ static int rk_nfc_write_page_hwecc(struct nand_chip *chip, const u8 *buf, 
	 *

	 *   0xFF 0xFF 0xFF 0xFF | BBM OOB1 OOB2 OOB3 | ...

	 *

	 * The code here just swaps the first 4 bytes with the last

	 * 4 bytes without losing any data.

	 *

	 * The chip->oob_poi data layout:

	 *

	 *    BBM  OOB1 OOB2 OOB3 |......|  PA0  PA1  PA2  PA3

	 *

	 * Configure the ECC algorithm supported by the boot ROM.

	 */

	if ((page < (pages_per_blk * rknand->boot_blks)) &&
@@ -635,21 +642,17 @@ static int rk_nfc_write_page_hwecc(struct nand_chip *chip, const u8 *buf, 
	}



	for (i = 0; i < ecc->steps; i++) {

		if (!i) {

			reg = 0xFFFFFFFF;

		} else {

		if (!i)

			oob = chip->oob_poi + (ecc->steps - 1) * NFC_SYS_DATA_SIZE;

		else

			oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE;

			reg = oob[0] | oob[1] << 8 | oob[2] << 16 |

			      oob[3] << 24;

		}



		if (!i && boot_rom_mode)

			reg = (page & (pages_per_blk - 1)) * 4;

		tmp = oob[0] | oob[1] << 8 | oob[2] << 16 | oob[3] << 24;



		if (nfc->cfg->type == NFC_V9)

			nfc->oob_buf[i] = reg;

			nfc->oob_buf[i] = tmp;

		else

			nfc->oob_buf[i * (oob_step / 4)] = reg;

			nfc->oob_buf[i * (oob_step / 4)] = tmp;

	}



	dma_data = dma_map_single(nfc->dev, (void *)nfc->page_buf,
@@ -812,12 +815,17 @@ static int rk_nfc_read_page_hwecc(struct nand_chip *chip, u8 *buf, int oob_on, 
		goto timeout_err;

	}



	for (i = 1; i < ecc->steps; i++) {

	for (i = 0; i < ecc->steps; i++) {

		if (!i)

			oob = chip->oob_poi + (ecc->steps - 1) * NFC_SYS_DATA_SIZE;

		else

			oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE;



		if (nfc->cfg->type == NFC_V9)

			tmp = nfc->oob_buf[i];

		else

			tmp = nfc->oob_buf[i * (oob_step / 4)];



		*oob++ = (u8)tmp;

		*oob++ = (u8)(tmp >> 8);

		*oob++ = (u8)(tmp >> 16);